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FPGA verification engineer

Accepting applications

Engtal · Austin, TX

Full-Time Mid_senior ASICC++FPGAPythonRTL
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
United States
My client are at the forefront of high-frequency trading, leveraging cutting-edge technology to stay ahead in a fast-paced and competitive market. The hardware team thrives on solving complex problems in low-latency systems, with a focus on delivering high-performance solutions for financial trading. I am seeking an FPGA Verification Engineer that knows the EDA landscape and wants to be a part of a team rethinking the status quo.

As part of the Hardware team, you will be responsible for creating testbenches and test for the FPGA platform, writing detailed verification plans, root-cause RTL bugs and collaborating directly with designers for rapid bring up of new projects and debugging of existing designs.

Qualifications:

Strong background (4+ years) in RTL functional verification for FPGA or ASIC.
Experience with code and functional coverage collection/analysis.
Experience with Python.
Comfortable in a Linux environment.
Familiarity with Verilator and/or Cocotb preferred.
Experience with networking protocols preferred.
C++ experience is a plus.
A bachelor's degree in Computer or Electrical Engineering or a related field.

If you're looking for a new position that's proactively at the forefront of changing the verification landscape within the trading industry then please apply!
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