FPGA / RTL Design Engineer

Job Title: FPGA / RTL Design Engineer

Location: San Jose, CA

Job Description

FPGA/RTL Design

Engineer to design, implement, and validate digital circuits and FPGA-based

solutions. This role involves hands-on development using RTL languages, FPGA

design tools, and simulation environments, while also supporting customers and

creating technical assets that enable successful adoption of our products.

Key Responsibilities

Design & Implementation: Develop RTL code (Verilog, VHDL, SystemVerilog) for

FPGA and digital circuits, integrating IP and system software.

Simulation & Debugging: Perform functional simulation, debug FPGA designs, and resolve design issues.
Validation & Testing: Create unit tests, example designs, and demos; ensurereadiness of feature releases.
Technical Enablement: Develop user guides, application notes, and training materials for customers.
Customer Support: Respond to technical inquiries, reproduce issues, and collaboraten with engineering teams for resolution.
Optimization Conduct synthesis, power, and thermal analysis to meet performance and efficiency targets.
Collaboration:Work closely with architecture, verification, and physical design teams to deliver high-quality solutions.

Minimum Qualifications

BS in Electrical/Computer Engineering or related field.
5+ years of experience in FPGA design, RTL development, or applications engineering.
Proficiency in FPGA design tools and third-party simulators.
Strong debugging skills and experience with FPGA development boards.
Expertise in RTL design using Verilog, VHDL, or SystemVerilog.

Preferred Qualifications

Experience with power/thermal analysis tools.
Scripting skills (TCL, Python).
Strong problem-solving and analytical abilities.
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