IM
FPGA Prototyping Engineer
Accepting applicationsI Machines, Inc. · Santa Clara, CA
Full-Time Mid_senior AIFPGARTLSoCSynopsys
Posted
5 May
Category
Design
Experience
Mid_senior
Country
United States
About Our Company
We’re a fast-paced, fabless semiconductor startup redefining the boundaries of AI through cutting-edge, scalable AI-infused compute architecture. Our mission is to deliver scalable, efficient, and intelligent silicon solutions for the next generation of edge AI, robotics, autonomous systems, and mobile devices. Our leadership team brings together decades of experience in semiconductor innovation, spanning chip architecture, system design, and global business operations. The team includes pioneers behind several generations of groundbreaking compute architectures, experts in software-hardware co-design, SoC and AI development with hundreds of patents in our portfolio as well as leaders of multi-billion-dollar business units at top-tier technology companies.
Position Overview
We are seeking an FPGA Prototyping Engineer to play a critical role in our pre‑silicon and early‑system validation efforts. This role focuses on FPGA‑based SoC prototyping and CPU bring‑up, leveraging HAPS‑200 platforms to enable early hardware/software co‑development and de‑risk silicon.
In this hands‑on role, you will work closely with architecture, RTL, firmware, and software teams to transform complex SoC designs into functional FPGA prototypes. You will be responsible for system bring‑up, Linux enablement, timing optimization, and multi‑clock‑domain debugging—bridging RTL design intent to real, working systems.
Key Responsibilities and Duties
Design, implement, and maintain FPGA‑based SoC prototypes using Synopsys HAPS‑200 systems.
Perform CPU and SoC bring‑up on FPGA platforms, including low‑level system debugging.
Enable Linux bring‑up on FPGA prototypes, including development and integration of required drivers for daughter card and peripheral interaction.
Address design partitioning challenges to achieve optimal FPGA utilization and maximum achievable frequency.
Analyze and resolve critical timing paths, including:
-Logic mapping and partition balancing
-Clock‑domain isolation and synchronization
-Hierarchical and functional partition optimization
Collaborate closely with architecture, RTL, verification, firmware, and software teams to ensure prototypes align with design intent and project milestones.
Troubleshoot and debug complex FPGA, timing, and system‑integration issues throughout the prototyping lifecycle.
Document FPGA bring‑up procedures, debug methodologies, partition strategies, and performance findings; provide regular status updates to stakeholders.
Qualifications and Skills
Successful candidates should possess the following qualifications and skills:
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Proven hands‑on experience with FPGA‑based SoC prototyping, including HAPS‑200 systems.
Demonstrated experience in CPU/SoC bring‑up on FPGA or emulation platforms.
Strong understanding of FPGA architecture, timing closure, clocking strategies, and multi‑clock‑domain designs.
Experience debugging system‑level issues spanning RTL, FPGA infrastructure, and software bring‑up.
Excellent problem‑solving skills and the ability to work effectively in cross‑functional teams.
Preferred / Nice‑to‑Have Qualifications
Experience with Linux bring‑up on FPGA‑based platforms.
Familiarity with high‑speed interfaces, daughter card integration, and board‑level debug.
Working knowledge of FPGA toolchains (e.g., synthesis, place‑and‑route, timing analysis).
Experience with pre‑silicon validation, emulation, or FPGA acceleration flows.
Background in fast‑paced or early‑stage semiconductor development environments.
Why Join Us
Get in early at a breakthrough deep-tech startup reshaping AI compute
Work closely with industry innovators and experienced leaders where your work will have a direct impact on the success of the company
Be part of a mission-driven team building foundational technology for the future
We balance sharp execution with continuous innovation to push the boundaries
Competitive compensation, equity, and growth opportunities
Benefits and Perks
At I Machines, Inc., we offer competitive salaries and a comprehensive benefits package, including:
Health, dental, and vision insurance
Retirement savings plans
Paid time off and holidays
Professional development opportunities
Flexible Schedule
Equal Opportunity Employer
I Machines, Inc., is an equal opportunity employer and does not discriminate based on race, color, religion, gender, national origin, age, disability, or any other legally protected status. All qualified applicants will be considered for employment.
Show more Show less
We’re a fast-paced, fabless semiconductor startup redefining the boundaries of AI through cutting-edge, scalable AI-infused compute architecture. Our mission is to deliver scalable, efficient, and intelligent silicon solutions for the next generation of edge AI, robotics, autonomous systems, and mobile devices. Our leadership team brings together decades of experience in semiconductor innovation, spanning chip architecture, system design, and global business operations. The team includes pioneers behind several generations of groundbreaking compute architectures, experts in software-hardware co-design, SoC and AI development with hundreds of patents in our portfolio as well as leaders of multi-billion-dollar business units at top-tier technology companies.
Position Overview
We are seeking an FPGA Prototyping Engineer to play a critical role in our pre‑silicon and early‑system validation efforts. This role focuses on FPGA‑based SoC prototyping and CPU bring‑up, leveraging HAPS‑200 platforms to enable early hardware/software co‑development and de‑risk silicon.
In this hands‑on role, you will work closely with architecture, RTL, firmware, and software teams to transform complex SoC designs into functional FPGA prototypes. You will be responsible for system bring‑up, Linux enablement, timing optimization, and multi‑clock‑domain debugging—bridging RTL design intent to real, working systems.
Key Responsibilities and Duties
Design, implement, and maintain FPGA‑based SoC prototypes using Synopsys HAPS‑200 systems.
Perform CPU and SoC bring‑up on FPGA platforms, including low‑level system debugging.
Enable Linux bring‑up on FPGA prototypes, including development and integration of required drivers for daughter card and peripheral interaction.
Address design partitioning challenges to achieve optimal FPGA utilization and maximum achievable frequency.
Analyze and resolve critical timing paths, including:
-Logic mapping and partition balancing
-Clock‑domain isolation and synchronization
-Hierarchical and functional partition optimization
Collaborate closely with architecture, RTL, verification, firmware, and software teams to ensure prototypes align with design intent and project milestones.
Troubleshoot and debug complex FPGA, timing, and system‑integration issues throughout the prototyping lifecycle.
Document FPGA bring‑up procedures, debug methodologies, partition strategies, and performance findings; provide regular status updates to stakeholders.
Qualifications and Skills
Successful candidates should possess the following qualifications and skills:
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Proven hands‑on experience with FPGA‑based SoC prototyping, including HAPS‑200 systems.
Demonstrated experience in CPU/SoC bring‑up on FPGA or emulation platforms.
Strong understanding of FPGA architecture, timing closure, clocking strategies, and multi‑clock‑domain designs.
Experience debugging system‑level issues spanning RTL, FPGA infrastructure, and software bring‑up.
Excellent problem‑solving skills and the ability to work effectively in cross‑functional teams.
Preferred / Nice‑to‑Have Qualifications
Experience with Linux bring‑up on FPGA‑based platforms.
Familiarity with high‑speed interfaces, daughter card integration, and board‑level debug.
Working knowledge of FPGA toolchains (e.g., synthesis, place‑and‑route, timing analysis).
Experience with pre‑silicon validation, emulation, or FPGA acceleration flows.
Background in fast‑paced or early‑stage semiconductor development environments.
Why Join Us
Get in early at a breakthrough deep-tech startup reshaping AI compute
Work closely with industry innovators and experienced leaders where your work will have a direct impact on the success of the company
Be part of a mission-driven team building foundational technology for the future
We balance sharp execution with continuous innovation to push the boundaries
Competitive compensation, equity, and growth opportunities
Benefits and Perks
At I Machines, Inc., we offer competitive salaries and a comprehensive benefits package, including:
Health, dental, and vision insurance
Retirement savings plans
Paid time off and holidays
Professional development opportunities
Flexible Schedule
Equal Opportunity Employer
I Machines, Inc., is an equal opportunity employer and does not discriminate based on race, color, religion, gender, national origin, age, disability, or any other legally protected status. All qualified applicants will be considered for employment.
Show more Show less