UT
FPGA Lead Engineer
Accepting applicationsUnivision Technology Consulting Pvt. Ltd. · Bengaluru, Karnataka, India
Full-Time Mid_senior FPGAPCIeRTL
Estimated market salary
₹17-31 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
15 Jun
Category
Design
Experience
Mid_senior
Country
India
🚀 Hiring: FPGA Lead Engineer | Bangalore
We are looking for an experienced FPGA Lead Engineer to join our team in Bangalore.
📍 Location: Bangalore
⏳ Notice Period: Immediate to 15 Days
💼 Experience: 10+ Years
🔹 Key Skills & Responsibilities:
• Strong experience in Intel/Altera FPGAs (Agilex, Stratix-10, Arria-10)
• Expertise in FPGA system architecture and design
• Hands-on experience with PCIe Gen4/Gen5 Hard IP
• Strong knowledge of Quartus Prime Pro and Platform Designer
• Experience in timing closure, floorplanning, and transceiver configuration
• Good understanding of NVMe/PCIe protocols, DMA engines, and high-speed digital design
• Ability to lead FPGA design reviews, integration activities, and performance optimization
• Expertise in CDC analysis, SDC constraints, SignalTap debugging, and RTL quality improvement
• Experience mentoring and guiding FPGA development teams
📩 Interested candidates can share their updated resume to:
gunashree.k@univisiontechnocon.com
#Hiring #FPGA #FPGALead #IntelFPGA #AlteraFPGA #Agilex #Stratix10 #Arria10 #PCIe #NVMe #RTLDesign #SemiconductorJobs #BangaloreJobs #EngineeringJobs #UnivisionTechnology
Show more Show less
We are looking for an experienced FPGA Lead Engineer to join our team in Bangalore.
📍 Location: Bangalore
⏳ Notice Period: Immediate to 15 Days
💼 Experience: 10+ Years
🔹 Key Skills & Responsibilities:
• Strong experience in Intel/Altera FPGAs (Agilex, Stratix-10, Arria-10)
• Expertise in FPGA system architecture and design
• Hands-on experience with PCIe Gen4/Gen5 Hard IP
• Strong knowledge of Quartus Prime Pro and Platform Designer
• Experience in timing closure, floorplanning, and transceiver configuration
• Good understanding of NVMe/PCIe protocols, DMA engines, and high-speed digital design
• Ability to lead FPGA design reviews, integration activities, and performance optimization
• Expertise in CDC analysis, SDC constraints, SignalTap debugging, and RTL quality improvement
• Experience mentoring and guiding FPGA development teams
📩 Interested candidates can share their updated resume to:
gunashree.k@univisiontechnocon.com
#Hiring #FPGA #FPGALead #IntelFPGA #AlteraFPGA #Agilex #Stratix10 #Arria10 #PCIe #NVMe #RTLDesign #SemiconductorJobs #BangaloreJobs #EngineeringJobs #UnivisionTechnology
Show more Show less
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