FPGA Engineer

RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
DO-254 Certification: Create artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and participate in FAA SOI audits.
Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing. [1]
Key Qualifications
Experience: Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.
Avionics Knowledge: Familiarity with design assurance standards (DO-254) is highly preferred.

Required Skills:
Expert‑level verification engineer with strong SystemVerilog and UVM experience or
FPGA verification background in lab testing and/or design verification testing
Experience with design on Xilinx products would be a strong plus
expected to communicate effectively with emerging engineers and provide both technical and process (DO-254) guidance to the verification team.
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