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FPGA Design Engineer
Accepting applicationsEpergne Solutions · Hyderabad, Telangana, India
Full-Time Mid DDREthernetFPGAPCIeRTL
Posted
6d ago
Category
Design
Experience
Mid
Country
India
Job Title: FPGA Design Engineer ? High-Speed Protocols
Experience: 5?10 Years
Job Location: Hyderabad,India
Job Summary
We are looking for an experienced FPGA Design Engineer with strong expertise in FPGA development and high-speed communication protocols. will be responsible for FPGA architecture, RTL design, verification, implementation, and debugging of high-performance digital systems.
Key Skills Required:
FPGA Design and Validation
RTL Design using Verilog/VHDL
FPGA Design Flow: Synthesis, Implementation, P&R, Timing Closure
Static Timing Analysis (STA)
CDC (Clock Domain Crossing) Analysis
FPGA Integration Experience
High-Speed Protocols: PCIe, Ethernet, DDR, Transceivers
Simulation using Questasim
Hardware Debugging and Board Bring-up
Experience using Oscilloscopes and Logic Analyzers
TCL Scripting
Vivado, Quartus, or Libero Tools
Responsibilities:
Design, integrate, and validate FPGA-based solutions.
Perform FPGA implementation, timing closure, STA, and CDC analysis.
Integrate protocol IPs and debug system-level issues.
Validate designs on FPGA hardware platforms and support board bring-up.
Perform simulation, debugging, and performance optimization.
Work closely with hardware, software, and system teams.
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Experience: 5?10 Years
Job Location: Hyderabad,India
Job Summary
We are looking for an experienced FPGA Design Engineer with strong expertise in FPGA development and high-speed communication protocols. will be responsible for FPGA architecture, RTL design, verification, implementation, and debugging of high-performance digital systems.
Key Skills Required:
FPGA Design and Validation
RTL Design using Verilog/VHDL
FPGA Design Flow: Synthesis, Implementation, P&R, Timing Closure
Static Timing Analysis (STA)
CDC (Clock Domain Crossing) Analysis
FPGA Integration Experience
High-Speed Protocols: PCIe, Ethernet, DDR, Transceivers
Simulation using Questasim
Hardware Debugging and Board Bring-up
Experience using Oscilloscopes and Logic Analyzers
TCL Scripting
Vivado, Quartus, or Libero Tools
Responsibilities:
Design, integrate, and validate FPGA-based solutions.
Perform FPGA implementation, timing closure, STA, and CDC analysis.
Integrate protocol IPs and debug system-level issues.
Validate designs on FPGA hardware platforms and support board bring-up.
Perform simulation, debugging, and performance optimization.
Work closely with hardware, software, and system teams.
Show more Show less