LM
FPGA Design Eng
Accepting applicationsLockheed Martin · Boulder, CO
Full-Time Mid C++FPGAMatlabRTLVHDL
Posted
2d ago
Category
Design
Experience
Mid
Country
United States
Basic Qualifications
Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering or related discipline, or equivalent experience/combined education.
Ability to obtain a TS/SCI Clearance required for this role.
Understanding of HDL Languages (VHDL & Verilog)
Experience designing with Vivado
Job Description
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. This position will help our team evolve ground-based mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite, the Vitis development platform (including High-Level Synthesis), and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
The Selected Candidate Will Be Expected To
develop an understanding of mission processing code written in C++ and implement for hardware processing.
develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
generate requirements, create FPGA code, and test bench development.
contribute to FPGA development workflows using both traditional RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform.
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace.
Desired Skills
Experience with Xilinx Vitis platform, including High-Level Synthesis (HLS) for FPGA development
Proficient in Matlab & C++
Digital logic design experience
Experience interfacing FPGAs with processors
Experience with Vitis Model Composer
Experience with Matlab HDL Coder
Familiarity with Xilinx platforms and tools
Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing
Experience with embedded software development
Familiarity with embedded Linux environments (e.g., Yocto)
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Onsite Full-time: The work associated with this position will be performed onsite at a designated Lockheed Martin facility.
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Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering or related discipline, or equivalent experience/combined education.
Ability to obtain a TS/SCI Clearance required for this role.
Understanding of HDL Languages (VHDL & Verilog)
Experience designing with Vivado
Job Description
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. This position will help our team evolve ground-based mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite, the Vitis development platform (including High-Level Synthesis), and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
The Selected Candidate Will Be Expected To
develop an understanding of mission processing code written in C++ and implement for hardware processing.
develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
generate requirements, create FPGA code, and test bench development.
contribute to FPGA development workflows using both traditional RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform.
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace.
Desired Skills
Experience with Xilinx Vitis platform, including High-Level Synthesis (HLS) for FPGA development
Proficient in Matlab & C++
Digital logic design experience
Experience interfacing FPGAs with processors
Experience with Vitis Model Composer
Experience with Matlab HDL Coder
Familiarity with Xilinx platforms and tools
Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing
Experience with embedded software development
Familiarity with embedded Linux environments (e.g., Yocto)
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Onsite Full-time: The work associated with this position will be performed onsite at a designated Lockheed Martin facility.
Show more Show less