LI
Formal Verification Engineer
Accepting applicationsLanceSoft, Inc. · Austin, TX
Contract Mid_senior CadencePerlPythonSynopsysTCL
Posted
1d ago
Category
Verification
Experience
Mid_senior
Country
United States
Job Title - Formal Verification Engineer ( Jasper Gold and/or VC Formal )
Job Location - Austin-TX
Job Description -
Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence)
Strong proficiency in System Verilog Assertions (SVA) and formal property specification
Experience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysis
Familiarity with scripting languages (TCL, Python, Perl) for flow automation
Extensive experience in design verification with a strong focus on formal verification
Expertise in System Verilog and UVM-based verification methodologies - Nice to have
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Job Location - Austin-TX
Job Description -
Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence)
Strong proficiency in System Verilog Assertions (SVA) and formal property specification
Experience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysis
Familiarity with scripting languages (TCL, Python, Perl) for flow automation
Extensive experience in design verification with a strong focus on formal verification
Expertise in System Verilog and UVM-based verification methodologies - Nice to have
Show more Show less