TO
Field-Programmable Gate Arrays Engineer
Accepting applicationsTalent on Staffing · Melbourne, FL
Full-Time Mid_senior ASICFPGARTLSOIUVM
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
United States
About the Company: We are seeking an expert-level Verification/Hardware Engineer with a strong background in DO-254 process compliance and hardware/FPGA verification. In this role, you will be responsible for technical execution as well as coordinating with remote/offshore verification teams and providing guidance on DO-254 process-related documentation and artifacts.
About the Role: A short paragraph summarizing the key role responsibilities.
Responsibilities:
RTL Design & Simulation: Develop and verify code and testbenches using VHDL, Verilog, and System Verilog.
Verification: Create UVM constrained-random test environments OR conduct lab/hardware-level FPGA design verification testing, including static timing, linting, and clock-domain-crossing (CDC) analyses.
DO-254 Certification: Produce and review artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and support FAA SOI audits.
Offshore Leadership: Coordinate with remote engineering teams (such as the India GETC-I site), providing technical and DO-254 process guidance to verification engineers.
Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing.
Qualifications:
8+ years of hands-on FPGA/ASIC hardware development and verification experience in defense or aerospace.
Strong background in DO-254 process compliance and documentation (DAL-A experience preferred).
Expertise in System Verilog / UVM verification OR extensive experience in FPGA lab testing and hardware design verification testing.
Experience with AMD/Xilinx products and tools (e.g., Vivado, ISE) is a strong plus.
Proven ability to lead/mentorship remote or offshore verification teams.
STEM Degree (BS/MS in Electrical, Electronic, or Computer Engineering).
Required Skills:
Strong background in DO-254 process compliance and documentation.
Expertise in System Verilog / UVM verification.
Extensive experience in FPGA lab testing and hardware design verification testing.
Preferred Skills:
Experience with AMD/Xilinx products and tools (e.g., Vivado, ISE).
Proven ability to lead/mentorship remote or offshore verification teams.
Show more Show less
About the Role: A short paragraph summarizing the key role responsibilities.
Responsibilities:
RTL Design & Simulation: Develop and verify code and testbenches using VHDL, Verilog, and System Verilog.
Verification: Create UVM constrained-random test environments OR conduct lab/hardware-level FPGA design verification testing, including static timing, linting, and clock-domain-crossing (CDC) analyses.
DO-254 Certification: Produce and review artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and support FAA SOI audits.
Offshore Leadership: Coordinate with remote engineering teams (such as the India GETC-I site), providing technical and DO-254 process guidance to verification engineers.
Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing.
Qualifications:
8+ years of hands-on FPGA/ASIC hardware development and verification experience in defense or aerospace.
Strong background in DO-254 process compliance and documentation (DAL-A experience preferred).
Expertise in System Verilog / UVM verification OR extensive experience in FPGA lab testing and hardware design verification testing.
Experience with AMD/Xilinx products and tools (e.g., Vivado, ISE) is a strong plus.
Proven ability to lead/mentorship remote or offshore verification teams.
STEM Degree (BS/MS in Electrical, Electronic, or Computer Engineering).
Required Skills:
Strong background in DO-254 process compliance and documentation.
Expertise in System Verilog / UVM verification.
Extensive experience in FPGA lab testing and hardware design verification testing.
Preferred Skills:
Experience with AMD/Xilinx products and tools (e.g., Vivado, ISE).
Proven ability to lead/mentorship remote or offshore verification teams.
Show more Show less