GC
Field-Programmable Gate Arrays Engineer
Accepting applicationsGeoLogics Corporation · Tucson, AZ
Contract Mid_senior ARMATEFPGARFUVM
Posted
29 May
Category
Design
Experience
Mid_senior
Country
United States
TITLE: FPGA Engineer with ACTIVE Secret Security Clearance
RATE RANGE: $65/hr - $116.00/hr W2 Contract Only
**Depends on experience and benefits chosen**
LOCATION: Tucson, AZ **No Relocation assistance provided**
DURATION: Contract or Contract to Hire
REQUIRED: Secret Security clearance issued by the Department of Defense
***No C2C, we can NOT work with outside agencies/vendors, and we can NOT do 1099
- SECRET CLEARANCE IS REQUIRED***
Geologics is seeking a Secret Cleared FPGA Engineer who will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route. Designs are verified against requirements using both directed test and constrained random methodologies.
POSITION OVERVIEW:
Design support is expected from requirements definition through integration and test.
Design documentation and configuration management are required.
Design and deliver production quality FPGA releases from initial proof of concept up to production
Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
Translate system level requirements into FPGA requirements
Design and code in VHDL for reliability and maintainability
Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
Help drive projects and execute to program schedules on time and budget
Create complete documentation including requirements, verification plan, and user's guides
May support internal and external technical reviews
REQUIREMENTS:
Active Secret Clearance
Bachelor of Science in Computer or Electrical Engineering and a minimum of 2 - 8+ years of experience to include at least 1 of the following:
Digital design and VHDL coding
Xilinx or Microsemi devices and flow tools
Delivering FPGA solutions to system level applications
Hands on experience with integration and debug
Ability to attain Special Program Access (SAP)
Qualifications We Value:****
FPGA design experience in one or more of the following areas:
Radar processing techniques
Image processing techniques for visual and infrared sensors
Embedded systems design using ARM, Microblaze, or Nios processors
Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
Constrained random verification in UVM using System Verilog
Verification utilizing emulation platforms, such as Veloce
Please respond to Meredith Baldwin with your interest level, recent copy of your resume and your availability for a call to Mbaldwin@geologics.com
*Rates listed are not a guarantee of salary/rate. Rate offered at time of hire will depend on many factors including education, experience, interview results and skill level
GeoLogics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran
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RATE RANGE: $65/hr - $116.00/hr W2 Contract Only
**Depends on experience and benefits chosen**
LOCATION: Tucson, AZ **No Relocation assistance provided**
DURATION: Contract or Contract to Hire
REQUIRED: Secret Security clearance issued by the Department of Defense
***No C2C, we can NOT work with outside agencies/vendors, and we can NOT do 1099
- SECRET CLEARANCE IS REQUIRED***
Geologics is seeking a Secret Cleared FPGA Engineer who will develop FPGA designs for all major vendors and device families including: Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route. Designs are verified against requirements using both directed test and constrained random methodologies.
POSITION OVERVIEW:
Design support is expected from requirements definition through integration and test.
Design documentation and configuration management are required.
Design and deliver production quality FPGA releases from initial proof of concept up to production
Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
Translate system level requirements into FPGA requirements
Design and code in VHDL for reliability and maintainability
Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
Help drive projects and execute to program schedules on time and budget
Create complete documentation including requirements, verification plan, and user's guides
May support internal and external technical reviews
REQUIREMENTS:
Active Secret Clearance
Bachelor of Science in Computer or Electrical Engineering and a minimum of 2 - 8+ years of experience to include at least 1 of the following:
Digital design and VHDL coding
Xilinx or Microsemi devices and flow tools
Delivering FPGA solutions to system level applications
Hands on experience with integration and debug
Ability to attain Special Program Access (SAP)
Qualifications We Value:****
FPGA design experience in one or more of the following areas:
Radar processing techniques
Image processing techniques for visual and infrared sensors
Embedded systems design using ARM, Microblaze, or Nios processors
Gigabit serial interfaces and multi-gigabit transceivers (MGTs)
Constrained random verification in UVM using System Verilog
Verification utilizing emulation platforms, such as Veloce
Please respond to Meredith Baldwin with your interest level, recent copy of your resume and your availability for a call to Mbaldwin@geologics.com
*Rates listed are not a guarantee of salary/rate. Rate offered at time of hire will depend on many factors including education, experience, interview results and skill level
GeoLogics is an Equal Opportunity/Affirmative Action Employer that is committed to hiring a diverse and talented workforce. EOE/Disability/Veteran
Show more Show less