Emulation Prototyping Engineer

Cspeed IO is a stealth start up backed by Sutter Hills Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.

Cspeed IO is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures.

Role Summary

The Emulation Lead is responsible for driving pre-silicon validation and performance analysis of complex Data Center SoCs using hardware emulation platforms. This role ensures early software bring-up, system-level validation, and debug of critical features before tape-out. The position involves architecting emulation strategies, building scalable environments, integrating IPs and subsystems, and enabling workloads representative of real data center use cases.

Key Responsibilities

Define emulation methodology for data center SoCs with CPU, NOC/Crossbar, Ethernet and high-speed IOs.
Develop partitioning strategies& set up emulation environments (Palladium, Veloce, ZeBu) and partition RTL for hardware-based platforms.
Port large-scale SoCs/IPs onto emulators, bring up the platform, and debug interface/functional issues involving firmware/hardware.
Integrate and develop synthesizable monitors/checkers, VIP transactors,NOC bridges (MAC/PHY DDR)
Emulation prototyping forboot loader bring-up, SoC configuration, first power-on sequences, clock/reset validation, strap/fuse programming
Own stress testing and completeness of data path includingEthernet PHY/MAC link bring-up, loopback tests; validate DMA descriptors, interrupts
Automate emulation regression flows using scripting (TCL, Python, Perl) andoptimize for coverage and debug time.
Collaborate closely with verification, firmware, software, architecture teams for pre-silicon validation and bring-up.

Required Skills

Strong exposure of emulation platformCadence Palladium, Synopsys ZeBu, Mentor Veloce
Strongproficiency in C/C++ and RTL partitioning for emulation platforms.
Drive validation activitiesex: bootloader bring-up and executing real-world workloads.
Waveform analysis, transaction-level debug, log parsing
Emulation + virtual models, FPGA prototyping.

Added Advantage

Understanding of System Verilog/UVM, SVA, coverage-driven verification
Python/TCL scripting experience and post-silicon bring-up
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