AB
Electrical Hardware Engineer
Accepting applicationsApex Bridge Talent Group · Melbourne, FL
Full-Time Mid_senior ASICFPGARTLSOISystemVerilog
Posted
18 Jun
Category
Design
Experience
Mid_senior
Country
United States
Business Title: Electrical Hardware Engineer
Location: Melbourne, FL
Job Type: Direct hire / Full-time
Required Skills:
Expert level verification engineer with strong SystemVerilog and/ or UVM experience or
FPGA verification in lab testing and/or Hardware FPGA design verification testing
Experience with design on Xilinx products would be a strong plus
expected to communicate effectively with emerging engineers at the India GETC I site and provide both technical and process (DO-254) guidance to the verification team.
Core Responsibilities:
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
DO-254 Certification: Create artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and participate in FAA SOI audits.
Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing.
Key Qualifications:
Experience: Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.
Avionics Knowledge: Familiarity with design assurance standards (DO-254) is highly preferred.
Note:
Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Required Skills:
Hardware Verification
System Verilog and/or UVM
FPGA verification in lab testing and/or Hardware FPGA design verification testing
Must have DO-254
Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Design on Xilinx products is strong plus
Show more Show less
Location: Melbourne, FL
Job Type: Direct hire / Full-time
Required Skills:
Expert level verification engineer with strong SystemVerilog and/ or UVM experience or
FPGA verification in lab testing and/or Hardware FPGA design verification testing
Experience with design on Xilinx products would be a strong plus
expected to communicate effectively with emerging engineers at the India GETC I site and provide both technical and process (DO-254) guidance to the verification team.
Core Responsibilities:
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
DO-254 Certification: Create artifacts required for Airborne Electronic Hardware (AEH) DAL-A certification and participate in FAA SOI audits.
Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing.
Key Qualifications:
Experience: Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
Education: Degree in a STEM (Science, Technology, Engineering, Mathematics) field.
Avionics Knowledge: Familiarity with design assurance standards (DO-254) is highly preferred.
Note:
Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Required Skills:
Hardware Verification
System Verilog and/or UVM
FPGA verification in lab testing and/or Hardware FPGA design verification testing
Must have DO-254
Candidate should be able to do coordination with offshore/ remote team and give (DO-254 process related documents) guidance to the verification team.
Design on Xilinx products is strong plus
Show more Show less
Similar Jobs
M
PRINCIPAL RTL DESIGN
Micron · Boise, United States, North America
M
Principal Engineer, High‑Speed RTL Design
Micron · Bangalore, India, Asia
N
ASIC TOP Floorplan Design Engineer
NVIDIA · Shanghai, China, Asia
N
Senior System Software Engineer, SoC Power and Performance - O-RAN Infrastructure
NVIDIA · 3 Locations