AA
DV Engineer
Accepting applicationsAd Astra Consultants · Bengaluru, Karnataka, India
Full-Time Associate ARMC++DDRPCIePerl
Posted
3d ago
Category
Verification
Experience
Associate
Country
India
Job Description
Clusters
IP Verification
Experience in executing IP/SS verification of complex blocks (CPU SS)
Strong experience in verifying Fabric/NOC/Interconnect blocks.
Knowledge of protocols such as AMBA suite (AXI-44/AHB), PCIe (preferably Gen5, Gen6), CXL, DDR, interrupt handling, and power management.
Excellent in System Verilog (SV), Universal Verification Methodology (UVM), test bench component development (BFM, Scoreboard, Checkers, Monitors), assertions, testbenches, test plans, and coverage & assertions
Excellent debugging skills
Scripting knowledge like Python, Perl etc.
SOC Verification
SOC DV, CPU DV, Bus Interconnects
ARM v8/v9, RISC-V, x86 Architecture
Memory Architecture(DRAM, Cache, MMU)
Cache Coherent Architectures
AXI, PCIe, DDR/HBM
Understand architecture and micro-architecture specifications.
Develop scalable Test benches (BFM, Scoreboard, Checkers, Monitors) in System Verilog and UVM.
Develop Tests, Functional Coverage Models and System Verilog Assertions
Proficient in System Verilog/UVM/OVM, OOP/C++ and Python scripting
Excellent debugging skills
Show more Show less
Clusters
IP Verification
Experience in executing IP/SS verification of complex blocks (CPU SS)
Strong experience in verifying Fabric/NOC/Interconnect blocks.
Knowledge of protocols such as AMBA suite (AXI-44/AHB), PCIe (preferably Gen5, Gen6), CXL, DDR, interrupt handling, and power management.
Excellent in System Verilog (SV), Universal Verification Methodology (UVM), test bench component development (BFM, Scoreboard, Checkers, Monitors), assertions, testbenches, test plans, and coverage & assertions
Excellent debugging skills
Scripting knowledge like Python, Perl etc.
SOC Verification
SOC DV, CPU DV, Bus Interconnects
ARM v8/v9, RISC-V, x86 Architecture
Memory Architecture(DRAM, Cache, MMU)
Cache Coherent Architectures
AXI, PCIe, DDR/HBM
Understand architecture and micro-architecture specifications.
Develop scalable Test benches (BFM, Scoreboard, Checkers, Monitors) in System Verilog and UVM.
Develop Tests, Functional Coverage Models and System Verilog Assertions
Proficient in System Verilog/UVM/OVM, OOP/C++ and Python scripting
Excellent debugging skills
Show more Show less