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Distinguished Silicon Architect
Accepting applicationsCognichip · Redwood City, CA
Full-Time Principal AIASICPythonRTLSoC
Posted
4 May
Category
Design
Experience
Principal
Country
United States
Job Title
Distinguished Silicon Architect
Job Description
Distinguished Silicon Architect Design agentic workflows, prompts, and domain knowledge that enable AI agents to perform production-quality chip design and verification. This role focuses on encoding deep silicon expertise - microarchitecture, RTL, DV, and EDA workflows - into structured agent behaviors, playbooks, and tool-aware processes.
Key Responsibilities
Customer Engagement, Domain Knowledge, Tool Enablement
Enagage with customers to understand their pain points
Encode chip-design expertise (RTL/DV best practices, microarchitectural patterns, failure modes) into reusable, agent-consumable knowledge and playbooks.
Define EDA tool usage for agents—when to run simulation, lint, CDC, synthesis, and STA, how to interpret results, and how to chain tools into reliable flows.
Agent Workflow & Orchestration
Design end-to-end agent workflows for chip design, verification, debugging, and iterative refinement using structured process graphs.
Decompose complex silicon workflows into executable agent steps with clear inputs, outputs, and success criteria, including hierarchical and iterative patterns.
Prompt Engineering & Agent Behavior
Develop high-quality prompts covering specification, microarchitecture, RTL, verification, and debug.
Define agent behavior models, guardrails, and few-shot examples that guide reasoning, assumption validation, and error handling in chip-design tasks
Required Qualifications
20+ years of experience (Staff) across the key domains: Chip Design & Verification
Digital IC, ASIC, or SoC design or verification, with strong hands-on expertise in SystemVerilog RTL and UVM.
Deep familiarity with lint, CDC/RDC, simulation, timing constraints, and STA, and a solid understanding of microarchitecture (pipelines, FIFOs, DMA, caches, interconnects).
Ability to clearly explain design tradeoffs and debugging strategies.
Agentic AI & Software Experience with LLM-based agent systems, prompt engineering, and workflow decomposition.
Familiarity with agent orchestration frameworks such as LangGraph, LangChain, AutoGen, or CrewAI, or equivalent custom systems.
Proficiency in Python and experience integrating external tools into automated workflows.
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Distinguished Silicon Architect
Job Description
Distinguished Silicon Architect Design agentic workflows, prompts, and domain knowledge that enable AI agents to perform production-quality chip design and verification. This role focuses on encoding deep silicon expertise - microarchitecture, RTL, DV, and EDA workflows - into structured agent behaviors, playbooks, and tool-aware processes.
Key Responsibilities
Customer Engagement, Domain Knowledge, Tool Enablement
Enagage with customers to understand their pain points
Encode chip-design expertise (RTL/DV best practices, microarchitectural patterns, failure modes) into reusable, agent-consumable knowledge and playbooks.
Define EDA tool usage for agents—when to run simulation, lint, CDC, synthesis, and STA, how to interpret results, and how to chain tools into reliable flows.
Agent Workflow & Orchestration
Design end-to-end agent workflows for chip design, verification, debugging, and iterative refinement using structured process graphs.
Decompose complex silicon workflows into executable agent steps with clear inputs, outputs, and success criteria, including hierarchical and iterative patterns.
Prompt Engineering & Agent Behavior
Develop high-quality prompts covering specification, microarchitecture, RTL, verification, and debug.
Define agent behavior models, guardrails, and few-shot examples that guide reasoning, assumption validation, and error handling in chip-design tasks
Required Qualifications
20+ years of experience (Staff) across the key domains: Chip Design & Verification
Digital IC, ASIC, or SoC design or verification, with strong hands-on expertise in SystemVerilog RTL and UVM.
Deep familiarity with lint, CDC/RDC, simulation, timing constraints, and STA, and a solid understanding of microarchitecture (pipelines, FIFOs, DMA, caches, interconnects).
Ability to clearly explain design tradeoffs and debugging strategies.
Agentic AI & Software Experience with LLM-based agent systems, prompt engineering, and workflow decomposition.
Familiarity with agent orchestration frameworks such as LangGraph, LangChain, AutoGen, or CrewAI, or equivalent custom systems.
Proficiency in Python and experience integrating external tools into automated workflows.
Show more Show less