OE
Director of Electrical Engineering
Accepting applicationsOSI Engineering · Palo Alto, CA
Full-Time Mid_senior AIASICDFTRFSoC
Posted
3d ago
Category
Test
Experience
Mid_senior
Country
United States
Director of Electrical Engineering
You’ll own the electrical engineering team for a breakthrough stealth-stage neurotechnology and brain-computer interface (BCI) startup building an AI-powered neural interface platform. In this role, you will own the wearable electrical architecture from schematic through production, helping bring a highly integrated next-generation device to market. The platform combines cameras, spatial audio microphones, EEG sensors, Wi-Fi/BLE connectivity, and advanced power management on a flex PCB embedded within a textile beanie, requiring deep expertise in compact wearable system design, signal integrity, and production-ready hardware development.
What You’ll Do
Own the electrical architecture across the platform — compute partitioning, sensor integration, power, RF, and SI/PI.
Lead schematic and PCB design for flex and rigid-flex multi-island layouts, and own SI/PI sign-off across every revision.
Architect the power tree — battery management, multi-rail regulation, USB-C charging, and dynamic power budgeting.
Own RF and wireless electrical design — antenna diversity, body-proximity tuning, and Wi-Fi/BLE coexistence.
Define and validate every communication bus on the platform — parallel and serial sensor interfaces, audio buses, inter-MCU links.
Drive part selection, benchmarking, and BOM ownership across MCUs, PMICs, RF SoCs, and the full electrical BOM, with second-source strategy.
Lead bring-up at the electrical layer — own SI, PI, power, and bus-level debug, and unblock firmware and subsystem leads on the way.
Drive the design through DFM and qualification gates with our CMs, and ship the product by end of year.
Build and lead the EE team as we scale from early test batches to production volumes.
Responsibilities:
10+ years designing complex consumer hardware, with at least one shipped product (wearable, audio, mobile, or comparable).
Deep mixed-signal expertise across MCU systems, sensor AFEs, audio DSPs, image sensor interfaces, RF/wireless, and battery/charging.
Strong SI/PI discipline with hands-on sign-off on flex and rigid-flex multi-island designs.
Direct experience architecting and validating multi-MCU communication buses — parallel and serial interfaces, inter-processor links.
Direct experience driving part selection, BOM ownership, and second-source strategy on a shipped product.
Track record of leading hardware bring-up and partnering closely with firmware on debug.
Comfortable owning overseas CM relationships and driving DFM, DFT, and DFA from prototype through volume.
Preferred Skills:
EEG, ECoG, or other biopotential systems — especially high-channel-count or dense sensor arrays.
Integrating low-power AI accelerator silicon into mixed-signal systems.
Custom ASIC bring-up, silicon co-design, or in-array readout architectures.
RF design for body-worn antennas and multi-radio coexistence.
Founding engineer or lead-level experience at an early-stage hardware company.
Diane Chen
408.550.2800 x130
Type: Fulltime
Location: Palo Alto, CA (Hybrid Schedule)
Salary Range: $300k - $350k/y (DOE)
Show more Show less
You’ll own the electrical engineering team for a breakthrough stealth-stage neurotechnology and brain-computer interface (BCI) startup building an AI-powered neural interface platform. In this role, you will own the wearable electrical architecture from schematic through production, helping bring a highly integrated next-generation device to market. The platform combines cameras, spatial audio microphones, EEG sensors, Wi-Fi/BLE connectivity, and advanced power management on a flex PCB embedded within a textile beanie, requiring deep expertise in compact wearable system design, signal integrity, and production-ready hardware development.
What You’ll Do
Own the electrical architecture across the platform — compute partitioning, sensor integration, power, RF, and SI/PI.
Lead schematic and PCB design for flex and rigid-flex multi-island layouts, and own SI/PI sign-off across every revision.
Architect the power tree — battery management, multi-rail regulation, USB-C charging, and dynamic power budgeting.
Own RF and wireless electrical design — antenna diversity, body-proximity tuning, and Wi-Fi/BLE coexistence.
Define and validate every communication bus on the platform — parallel and serial sensor interfaces, audio buses, inter-MCU links.
Drive part selection, benchmarking, and BOM ownership across MCUs, PMICs, RF SoCs, and the full electrical BOM, with second-source strategy.
Lead bring-up at the electrical layer — own SI, PI, power, and bus-level debug, and unblock firmware and subsystem leads on the way.
Drive the design through DFM and qualification gates with our CMs, and ship the product by end of year.
Build and lead the EE team as we scale from early test batches to production volumes.
Responsibilities:
10+ years designing complex consumer hardware, with at least one shipped product (wearable, audio, mobile, or comparable).
Deep mixed-signal expertise across MCU systems, sensor AFEs, audio DSPs, image sensor interfaces, RF/wireless, and battery/charging.
Strong SI/PI discipline with hands-on sign-off on flex and rigid-flex multi-island designs.
Direct experience architecting and validating multi-MCU communication buses — parallel and serial interfaces, inter-processor links.
Direct experience driving part selection, BOM ownership, and second-source strategy on a shipped product.
Track record of leading hardware bring-up and partnering closely with firmware on debug.
Comfortable owning overseas CM relationships and driving DFM, DFT, and DFA from prototype through volume.
Preferred Skills:
EEG, ECoG, or other biopotential systems — especially high-channel-count or dense sensor arrays.
Integrating low-power AI accelerator silicon into mixed-signal systems.
Custom ASIC bring-up, silicon co-design, or in-array readout architectures.
RF design for body-worn antennas and multi-radio coexistence.
Founding engineer or lead-level experience at an early-stage hardware company.
Diane Chen
408.550.2800 x130
Type: Fulltime
Location: Palo Alto, CA (Hybrid Schedule)
Salary Range: $300k - $350k/y (DOE)
Show more Show less