TS
Director
Accepting applicationsTechlabs Semiconductor Pvt. Ltd. · Bengaluru, Karnataka, India
Full-Time Principal AIASICCadenceDDRDFT
Posted
12 Jun
Category
Verification
Experience
Principal
Country
India
About the Company
Techlabs Semiconductor Private Limited is a wholly owned subsidiary company of Trident Techlabs Limited, a leading provider of semiconductor services offering comprehensive end-to-end solutions across design, verification, validation, testing, Systems Design, manufacturing and AI. We serve a diverse range of industries, including Consumer Electronics, Automotive, Semiconductor, Telecommunications, Defence, Armed forces and Industrial Automation.
About Role:
We are seeking a highly experienced Design Verification Engineers to oversee and drive the verification strategy, planning, and execution for complex SoC/ASIC designs. The ideal candidate will have deep expertise in functional verification methodologies, proven leadership in verification team management, and hands-on experience in product companies as well as design services organizations.
The candidate should possess strong technical, managerial, and communication skills to interact with cross-functional teams including design, architecture, firmware, and validation.
Key Responsibilities
1. Verification Strategy & Planning
Define and own the end-to-end verification strategy for SoC/ASIC IPs and subsystems.
Develop test plans, coverage metrics, verification environments, and closure criteria.
Evaluate and implement state-of-the-art methodologies (UVM, SystemVerilog, formal verification, etc.).
Drive verification methodology standardization across multiple projects.
2. Project & Team Leadership
Lead a team of verification engineers (on-site and offshore).
Plan project schedules, resource allocation, and task prioritization.
Ensure high-quality deliverables with on-time execution.
Mentor and guide junior engineers in technical and career development.
3. Hands-on Technical Contribution
Architect and develop UVM-based verification environments and reusable testbench components.
Perform testbench integration, debug, simulation, and coverage analysis.
Drive coverage closure—functional, code, and assertion-based.
Conduct and participate in code and test plan reviews.
Collaborate with RTL design and architecture teams for issue resolution and feature clarification.
4. Cross-functional Collaboration
Work closely with DFT, validation, firmware, and architecture teams to ensure complete verification coverage.
Interface with customers (for design services role) to define verification requirements, delivery schedules, and expectations.
Provide technical presentations and updates to internal and external stakeholders.
5. Process & Quality Ownership
Establish and enforce verification best practices, version control, and regression management processes.
Ensure compliance with project quality and sign-off standards.
Participate in post-silicon validation planning and support bring-up activities when required.
Required Technical Skills
Strong expertise in SystemVerilog, UVM, and Assertion-Based Verification (ABV).
Proficient in coverage-driven verification and random/constrained-random testbench development.
Experience with industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, Siemens QuestaSim).
Exposure to Formal Verification and Emulation/FPGA-based verification flows.
Understanding of SoC architectures, bus protocols (AMBA AXI/AHB/APB, PCIe, UCIe, Ethernet, DDR, etc.), and low-power verification (UPF/CPF).
Familiarity with Scripting Languages (Perl, Python, Tcl, Shell) for automation.
Working knowledge of version control systems (Git, Perforce) and CI/CD verification flows.
Preferred Experience
Experience in full chip verification and multi-IP SoC integration.
Exposure to AI/ML, automotive, networking, or high-performance computing SoCs.
Proven experience in both product-based and design services organizations.
Knowledge of hardware-software co-verification and SystemC/TLM modeling is a plus.
Familiarity with post-silicon validation and lab bring-up environments.
Educational Qualifications
Bachelor’s or Master’s degree in Electronics & Electrical with VLSI background
Additional certifications or training in verification methodologies or EDA tools preferred.
Soft Skills & Leadership Qualities
Strong analytical, problem-solving, and debugging skills.
Excellent communication and presentation abilities.
Capable of managing distributed and multicultural teams.
Strategic thinker with an eye for innovation and process improvement.
Proven track record of mentoring and building high-performing teams.
Show more Show less
Techlabs Semiconductor Private Limited is a wholly owned subsidiary company of Trident Techlabs Limited, a leading provider of semiconductor services offering comprehensive end-to-end solutions across design, verification, validation, testing, Systems Design, manufacturing and AI. We serve a diverse range of industries, including Consumer Electronics, Automotive, Semiconductor, Telecommunications, Defence, Armed forces and Industrial Automation.
About Role:
We are seeking a highly experienced Design Verification Engineers to oversee and drive the verification strategy, planning, and execution for complex SoC/ASIC designs. The ideal candidate will have deep expertise in functional verification methodologies, proven leadership in verification team management, and hands-on experience in product companies as well as design services organizations.
The candidate should possess strong technical, managerial, and communication skills to interact with cross-functional teams including design, architecture, firmware, and validation.
Key Responsibilities
1. Verification Strategy & Planning
Define and own the end-to-end verification strategy for SoC/ASIC IPs and subsystems.
Develop test plans, coverage metrics, verification environments, and closure criteria.
Evaluate and implement state-of-the-art methodologies (UVM, SystemVerilog, formal verification, etc.).
Drive verification methodology standardization across multiple projects.
2. Project & Team Leadership
Lead a team of verification engineers (on-site and offshore).
Plan project schedules, resource allocation, and task prioritization.
Ensure high-quality deliverables with on-time execution.
Mentor and guide junior engineers in technical and career development.
3. Hands-on Technical Contribution
Architect and develop UVM-based verification environments and reusable testbench components.
Perform testbench integration, debug, simulation, and coverage analysis.
Drive coverage closure—functional, code, and assertion-based.
Conduct and participate in code and test plan reviews.
Collaborate with RTL design and architecture teams for issue resolution and feature clarification.
4. Cross-functional Collaboration
Work closely with DFT, validation, firmware, and architecture teams to ensure complete verification coverage.
Interface with customers (for design services role) to define verification requirements, delivery schedules, and expectations.
Provide technical presentations and updates to internal and external stakeholders.
5. Process & Quality Ownership
Establish and enforce verification best practices, version control, and regression management processes.
Ensure compliance with project quality and sign-off standards.
Participate in post-silicon validation planning and support bring-up activities when required.
Required Technical Skills
Strong expertise in SystemVerilog, UVM, and Assertion-Based Verification (ABV).
Proficient in coverage-driven verification and random/constrained-random testbench development.
Experience with industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, Siemens QuestaSim).
Exposure to Formal Verification and Emulation/FPGA-based verification flows.
Understanding of SoC architectures, bus protocols (AMBA AXI/AHB/APB, PCIe, UCIe, Ethernet, DDR, etc.), and low-power verification (UPF/CPF).
Familiarity with Scripting Languages (Perl, Python, Tcl, Shell) for automation.
Working knowledge of version control systems (Git, Perforce) and CI/CD verification flows.
Preferred Experience
Experience in full chip verification and multi-IP SoC integration.
Exposure to AI/ML, automotive, networking, or high-performance computing SoCs.
Proven experience in both product-based and design services organizations.
Knowledge of hardware-software co-verification and SystemC/TLM modeling is a plus.
Familiarity with post-silicon validation and lab bring-up environments.
Educational Qualifications
Bachelor’s or Master’s degree in Electronics & Electrical with VLSI background
Additional certifications or training in verification methodologies or EDA tools preferred.
Soft Skills & Leadership Qualities
Strong analytical, problem-solving, and debugging skills.
Excellent communication and presentation abilities.
Capable of managing distributed and multicultural teams.
Strategic thinker with an eye for innovation and process improvement.
Proven track record of mentoring and building high-performing teams.
Show more Show less
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