N
Digital HW Engineer 4
Accepting applicationsNokia · Sunnyvale, CA
Full-Time Mid_senior AIASICAnalogCMOSCadence
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
United States
Job Description
High-Speed Analog EDA/CAD Engineer:
Brief Description: Full-time position.
Infinera is seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip design in the Optical Modules Group (OMG) located in Sunnyvale, CA.
Description:
Infinera is seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including foundry interface, PDK installation and support, tool evaluation and installation, layout, archive and tapeout. The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks will include significant tool and PDK customization and design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions.
Responsibilities:
Install, customize and support external vendor PDK’s for both SiGe and CMOS processes
Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows.
Execute and support layout efforts including archive and tapeout processes
Minimum Expertise Requirements:
Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior critical thinking skills, problem solving capabilities and engineering judgment.
Fluent with analog EDA front and back end tools
Cadence Virtuoso, ADE
Strong SKILL programming a must
Mentor Calibre (end user support and rule deck writing)
Detailed understanding of advanced high-speed analog & mixed-signal layout concepts
FlexLM license management
Strong UNIX/Linux knowledge
Not required but preferred
Perforce
Ocean scripting and advanced modelling and simulation knowledge
Linux OS support
Minimum Experience Requirements:
5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required
IC Technologies: High-speed IC technologies, including CMOS and bipolar.
IC Design Software:
Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must.
Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must.
General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification.
Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.
Education Requirements:
BS 5+ years
MS 4+ years
PhD 3+ years
How You Will Contribute And What You Will Learn
Install, customize and support external vendor PDK’s for both SiGe and CMOS processes
Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows.
Execute and support layout efforts including archive and tapeout processes
Key Skills And Experience
5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required
IC Technologies: High-speed IC technologies, including CMOS and bipolar.
IC Design Software:
Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must.
Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must.
General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification.
Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.
About Us
Advancing connectivity to secure a brighter world.
Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.
Learn more about life at Nokia .
Our recruitment process
We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.
If you’re interested in this role but don’t meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.
The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia .
About The Team
Some of our benefits in US :
Corporate Retirement Savings Plan
Health and dental benefits
Short-term disability, and long-term disability
Life insurance, and AD&D – Company paid 2x base pay
Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
Paid time off for holidays and Vacation
Employee Stock Purchase Plan
Tuition Assistance Plan
Adoption assistance
Employee Assistance Program/Work Life Resource Program
The above benefits exclude students.
Disclaimer for US/Canada
Nokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.
All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.
Show more Show less
High-Speed Analog EDA/CAD Engineer:
Brief Description: Full-time position.
Infinera is seeking an EDA/CAD Engineer to support SiGE and CMOS research & development and chip design in the Optical Modules Group (OMG) located in Sunnyvale, CA.
Description:
Infinera is seeking an EDA/CAD Engineer to support and develop SiGe and CMOS design solutions for the high speed analog ASIC design team. The engineer will be hands-on with all phases of tool flow including foundry interface, PDK installation and support, tool evaluation and installation, layout, archive and tapeout. The engineer must be an expert in analog and mixed-signal circuit design flows and tools. Tasks will include significant tool and PDK customization and design team support. The self-motivated engineer must be able to anticipate problems and devise effective solutions.
Responsibilities:
Install, customize and support external vendor PDK’s for both SiGe and CMOS processes
Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows.
Execute and support layout efforts including archive and tapeout processes
Minimum Expertise Requirements:
Expert in high-speed analog and mixed-signal IC design concepts and must demonstrate superior critical thinking skills, problem solving capabilities and engineering judgment.
Fluent with analog EDA front and back end tools
Cadence Virtuoso, ADE
Strong SKILL programming a must
Mentor Calibre (end user support and rule deck writing)
Detailed understanding of advanced high-speed analog & mixed-signal layout concepts
FlexLM license management
Strong UNIX/Linux knowledge
Not required but preferred
Perforce
Ocean scripting and advanced modelling and simulation knowledge
Linux OS support
Minimum Experience Requirements:
5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required
IC Technologies: High-speed IC technologies, including CMOS and bipolar.
IC Design Software:
Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must.
Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must.
General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification.
Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.
Education Requirements:
BS 5+ years
MS 4+ years
PhD 3+ years
How You Will Contribute And What You Will Learn
Install, customize and support external vendor PDK’s for both SiGe and CMOS processes
Install, customize and support Custom IC and RF CAD environment for the design of high-speed (10–40 Gb/s), broad-band, mixed-signal, integrated circuits for fiber-based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools and design flows.
Execute and support layout efforts including archive and tapeout processes
Key Skills And Experience
5 years of experience working as a high-speed analog & mixed signal IC CAD professional is required
IC Technologies: High-speed IC technologies, including CMOS and bipolar.
IC Design Software:
Experience with configuring, documenting, and maintaining high speed analog IC design flows is a must.
Experience with transistor-level IC design and verification software, e.g. Cadence Composer, Cadence Virtuoso, Cadence Spectre, Virtuoso AMS, Mentor Calibre, Skill language, is a must.
General understanding of digital physical design flows, e.g. RTL coding, place and route, DRC/LVS verification.
Work Environment: Comfortable working in a fast-paced environment. Must be strong individual contributor, and also able to work as member of a small team. Must be able to support EPDA users and solve problems efficiently, effectively and rapidly.
About Us
Advancing connectivity to secure a brighter world.
Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.
Learn more about life at Nokia .
Our recruitment process
We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.
If you’re interested in this role but don’t meet every listed requirement, we still encourage you to apply. Unique backgrounds, perspectives, and experiences enrich our teams, and you may be just the right candidate for this or another opportunity.
The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates. Discover more about the recruitment process at Nokia .
About The Team
Some of our benefits in US :
Corporate Retirement Savings Plan
Health and dental benefits
Short-term disability, and long-term disability
Life insurance, and AD&D – Company paid 2x base pay
Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
Paid time off for holidays and Vacation
Employee Stock Purchase Plan
Tuition Assistance Plan
Adoption assistance
Employee Assistance Program/Work Life Resource Program
The above benefits exclude students.
Disclaimer for US/Canada
Nokia Maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.
All North America job posts will post for a minimum of 7 calendar days and up to 180 days or until candidate/s identified.
Show more Show less
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