DFX Verification Engineer

Job Summary
We are seeking a skilled DFX Engineer with 4+ years of experience in SoC RTL/DFx verification, debug, and gate-level simulations. The ideal candidate will have strong expertise in Verilog coding, JTAG, and test mode verification, along with a solid understanding of silicon debug and pattern generation.




Key Responsibilit
ieExecute and debug Gate-Level Simulations (GL
S)Develop and maintain testbench and verification environme
ntWork on Verilog coding and design validati
onValidate JTAG functionality and test mode operati
onAnalyze and troubleshoot DFx-related issues across the design cyc
leCollaborate with design, validation, and silicon teams for issue resoluti
onSupport post-silicon debug and bring-up activiti
esPerform SoC RTL and DFX verification and debuggi

ng
Required S
kilStrong experience in SoC RTL/DFx verification and de
bugHands-on experience in GLS simulations and debugg
ingProficiency in Verilog/SystemVerilog cod
ingGood understanding of JTAG architecture and proto
colExperience in test mode verificat
ionStrong debugging and problem-solving ski

lls
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