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DFT MBIST Staff Engineer
Accepting applicationsCortex Consultants LLC · Bengaluru, Karnataka, India
Full-Time Mid_senior AIATPGBISTCadenceDFT
Estimated market salary
₹44-79 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
21h ago
Category
Test
Experience
Mid_senior
Country
India
Company Description Cortex Consultants LLC is a global workforce solutions provider with 15 years of experience in technology staffing and offshoring services. The company’s flagship “Virtual Development Center” (VDC) offering helps clients rapidly establish technology captives in India with minimal risk, often within 90 days of contract sign-off. Cortex uses flexible engagement models such as BOT (Build, Operate, Transfer), BOM (Build, Operate, Maintain), and Managed Captive to align with clients’ strategic goals and support scalable tech operations. Backed by AI-based sourcing and robust processes, Cortex focuses on a customer-first and people-centric approach that drives continuous innovation, faster time to market, and improved employee satisfaction. The company is built on pillars of agility, transparency, and innovation, serving diverse clients across industries.
Role Description The DFT MBIST Staff Engineer is a full-time, on-site role based in Bengaluru, responsible for design-for-test (DFT) and memory built-in self-test (MBIST) activities for complex semiconductor designs. Day-to-day tasks include defining DFT and MBIST architectures, developing and integrating test logic, and collaborating with design and verification teams to ensure testability and coverage targets are met. The engineer will generate, review, and optimize test patterns, work on test case development and validation, and support functional and structural testing across the chip lifecycle. The role involves close coordination with test engineering teams to enable efficient test flows, debug issues from silicon bring-up, and continuously improve test methodologies and quality metrics.
Qualifications
Strong skills in test engineering, including experience with DFT and MBIST implementation for complex SoCs or ASICs.
Hands-on expertise in test execution, test cases creation, and test plan development for semiconductor or embedded systems.
Proficiency in testing methodologies, with practical exposure to functional testing and validation of digital and memory subsystems.
Deep understanding of digital design concepts, scan insertion, ATPG, BIST, and related EDA tools (e.g., Synopsys, Cadence, Mentor).
Experience with scripting languages (such as Python, TCL, or Perl) to automate test flows and improve efficiency.
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related technical field.
Ability to collaborate effectively in cross-functional engineering teams and communicate clearly with stakeholders.
Background in silicon bring-up, failure analysis, and test optimization is a strong advantage.
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Role Description The DFT MBIST Staff Engineer is a full-time, on-site role based in Bengaluru, responsible for design-for-test (DFT) and memory built-in self-test (MBIST) activities for complex semiconductor designs. Day-to-day tasks include defining DFT and MBIST architectures, developing and integrating test logic, and collaborating with design and verification teams to ensure testability and coverage targets are met. The engineer will generate, review, and optimize test patterns, work on test case development and validation, and support functional and structural testing across the chip lifecycle. The role involves close coordination with test engineering teams to enable efficient test flows, debug issues from silicon bring-up, and continuously improve test methodologies and quality metrics.
Qualifications
Strong skills in test engineering, including experience with DFT and MBIST implementation for complex SoCs or ASICs.
Hands-on expertise in test execution, test cases creation, and test plan development for semiconductor or embedded systems.
Proficiency in testing methodologies, with practical exposure to functional testing and validation of digital and memory subsystems.
Deep understanding of digital design concepts, scan insertion, ATPG, BIST, and related EDA tools (e.g., Synopsys, Cadence, Mentor).
Experience with scripting languages (such as Python, TCL, or Perl) to automate test flows and improve efficiency.
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related technical field.
Ability to collaborate effectively in cross-functional engineering teams and communicate clearly with stakeholders.
Background in silicon bring-up, failure analysis, and test optimization is a strong advantage.
Show more Show less