ED
DFT Lead_Eximietas Design_Visakhapatnam
Accepting applicationsEximietas Design · Visakhapatnam, Andhra Pradesh, India
Full-Time Mid_senior ATPGAnalogBISTBoundary ScanCadence
Posted
1 Jun
Category
Test
Experience
Mid_senior
Country
India
Hi All,
Greetings from Eximietas Design...!
π We're Hiring | Senior DFT Professionals | Eximietas Design
πLocations:
India: Bengaluru, Hyderabad & Visakhapatnam.
πSan Jose (Bay Area), USA
Eligibility (USA): U.S. Permanent Residents (Green Card holders).
πΌ Experience: 5 to 20+ Years
Job Description:
We are seeking motivated Design for Test (DFT) professionals to join our growing team. You will be responsible for the end-to-end DFT flow, from RTL to final pattern delivery, across complex IP, Subsystem, and SoC designs.
Key Skills:
β End-to-End DFT Flow Ownership.
β Scan Insertion, EDT & OCC.
β ATPG, DRC Analysis & Coverage Closure.
β Pattern Simulation & Debugging.
β SoC Integration & Pattern Retargeting.
β MBIST, IJTAG & JTAG Implementation.
β DFT Sign-off Activities.
Tools Expertise:
πΉ Siemens Tessent.
πΉ Synopsys TestMAX / TetraMAX.
πΉ Cadence Modus.
Preferred Skills:
β Streaming Scan Network (SSN).
β Analog & Mixed-Signal DFT.
β SpyGlass DFT.
β RTL DFT Methodologies.
β TCL, Python & Perl Scripting.
Core Responsibilities:
β’ End-to-end ownership of DFT implementation flow from RTL to sign-off.
β’ Scan architecture implementation including EDT & OCC.
β’ ATPG, DRC analysis, coverage optimization, and pattern simulations.
β’ SoC integration, pattern retargeting, and DFT debugging.
β’ MBIST, IJTAG, and Boundary Scan (JTAG) integration.
β’ Collaboration with Design, Verification, and Physical Design teams.
β’ DFT sign-off ownership and deliverables.
Technical Requirements:
β’ Strong experience in ATPG simulations and netlist handling.
β’ Expertise in block-level and SoC-level pattern retargeting/debugging.
β’ Strong understanding of ICL and PDL standards.
β’ Hands-on experience with Tessent, TestMAX/TetraMAX, or Modus.
π© Interested candidates can share their updated resume at:
maruthiprasad.e@eximietas.design
π Contact: +91 8088969910
π€ Referrals are highly appreciated. Please share within your network.
Best Regards,
Maruthy Prasaad
Associate VLSI Manager β Talent Acquisition | Visakhapatnam
Eximietas Design (Excellence by Design)
Inspired by nature, driven by silicon.
Show more Show less
Greetings from Eximietas Design...!
π We're Hiring | Senior DFT Professionals | Eximietas Design
πLocations:
India: Bengaluru, Hyderabad & Visakhapatnam.
πSan Jose (Bay Area), USA
Eligibility (USA): U.S. Permanent Residents (Green Card holders).
πΌ Experience: 5 to 20+ Years
Job Description:
We are seeking motivated Design for Test (DFT) professionals to join our growing team. You will be responsible for the end-to-end DFT flow, from RTL to final pattern delivery, across complex IP, Subsystem, and SoC designs.
Key Skills:
β End-to-End DFT Flow Ownership.
β Scan Insertion, EDT & OCC.
β ATPG, DRC Analysis & Coverage Closure.
β Pattern Simulation & Debugging.
β SoC Integration & Pattern Retargeting.
β MBIST, IJTAG & JTAG Implementation.
β DFT Sign-off Activities.
Tools Expertise:
πΉ Siemens Tessent.
πΉ Synopsys TestMAX / TetraMAX.
πΉ Cadence Modus.
Preferred Skills:
β Streaming Scan Network (SSN).
β Analog & Mixed-Signal DFT.
β SpyGlass DFT.
β RTL DFT Methodologies.
β TCL, Python & Perl Scripting.
Core Responsibilities:
β’ End-to-end ownership of DFT implementation flow from RTL to sign-off.
β’ Scan architecture implementation including EDT & OCC.
β’ ATPG, DRC analysis, coverage optimization, and pattern simulations.
β’ SoC integration, pattern retargeting, and DFT debugging.
β’ MBIST, IJTAG, and Boundary Scan (JTAG) integration.
β’ Collaboration with Design, Verification, and Physical Design teams.
β’ DFT sign-off ownership and deliverables.
Technical Requirements:
β’ Strong experience in ATPG simulations and netlist handling.
β’ Expertise in block-level and SoC-level pattern retargeting/debugging.
β’ Strong understanding of ICL and PDL standards.
β’ Hands-on experience with Tessent, TestMAX/TetraMAX, or Modus.
π© Interested candidates can share their updated resume at:
maruthiprasad.e@eximietas.design
π Contact: +91 8088969910
π€ Referrals are highly appreciated. Please share within your network.
Best Regards,
Maruthy Prasaad
Associate VLSI Manager β Talent Acquisition | Visakhapatnam
Eximietas Design (Excellence by Design)
Inspired by nature, driven by silicon.
Show more Show less