V
DFT Engineers
Accepting applicationsVDart · Santa Clara County, CA
Full-Time Mid_senior ASICATPGBoundary ScanDFTJTAG
Posted
5d ago
Category
Test
Experience
Mid_senior
Country
United States
Job role : DFT Engineer
Location : Santa Clara, California.
Job type : FTE
Required Skills & Qualifications
5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
Strong understanding of DFT fundamentals including controllability, observability, and scan- based testing
Proven expertise in ATPG pattern generation, analysis, and debug
Experience with MBIST, including memory test architectures and diagnostics
Knowledge of IO Test methodologies for interface and pin level validation
Solid understanding of clock DFT and clock verification concepts
Strong grasp of digital design and RTL fundamentals
Experience with industry standard DFT/ATPG EDA tools
Ability to work effectively in fast paced, high performance semiconductor programs
Strong analytical, problem solving, and communication skills
Familiarity with the Siemens suite of DFT tools
DFT insertion for SCAN (with SSN) and MBIST
MBIST Repair Implementation and Verification
Generating collaterals for Test Timing and Place and Route
Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec
Verification of DFT features, including
Boundary Scan
JTAG
SCAN
MBIST
High Speed IO
Show more Show less
Location : Santa Clara, California.
Job type : FTE
Required Skills & Qualifications
5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs
Strong understanding of DFT fundamentals including controllability, observability, and scan- based testing
Proven expertise in ATPG pattern generation, analysis, and debug
Experience with MBIST, including memory test architectures and diagnostics
Knowledge of IO Test methodologies for interface and pin level validation
Solid understanding of clock DFT and clock verification concepts
Strong grasp of digital design and RTL fundamentals
Experience with industry standard DFT/ATPG EDA tools
Ability to work effectively in fast paced, high performance semiconductor programs
Strong analytical, problem solving, and communication skills
Familiarity with the Siemens suite of DFT tools
DFT insertion for SCAN (with SSN) and MBIST
MBIST Repair Implementation and Verification
Generating collaterals for Test Timing and Place and Route
Expertise in IJTAG 1687 standard and good at understanding ICL and PDL standard Spec
Verification of DFT features, including
Boundary Scan
JTAG
SCAN
MBIST
High Speed IO
Show more Show less