QG

DFT Engineer ( TestMAX formerly DFTMAX/TetraMAX)

Accepting applications

Quest Global · United States, United States, North America

Full-Time Senior ATPGDFTJtagPerlPython
Posted
15 Apr
Category
Test
Experience
Senior
Country
United States
  • Responsible for implementing the Hardware Design-for-Test (DFT) features.
  • Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.
  • The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship.

Minimum Qualifications:

  • Bachelor's or a Master’s Degree in Electrical or Computer Engineering required with at least 5 years of experience.
  • Knowledge of the latest innovative trends in DFT, test and silicon engineering.
  • Experience with Jtag protocols, Scan insertion and ATPG.
  • Experience with ATPG and EDA tools like TestMax, Tetramax is a must.
  • Scripting skills: Tcl, Python/Perl.