MP
DFT Engineer
Accepting applicationsMPower Plus · Mountain View, CA
Full-Time Mid_senior ASICATPGBoundary ScanDFTJTAG
Posted
2d ago
Category
Test
Experience
Mid_senior
Country
United States
Role: DFT Engineer
Location: Mountain View, CA (Hybrid 3days/week)
Job Type: FTE/Permanent
Role Purpose
We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan
Key Responsibilitie
s:Work on Scan insertion, ATPG, GLS (timing/non-timing)
Implement MBIST and/or Boundary Scan (BSCAN, JTAG)
Support DFT architecture and chip-level integration
Debug DFT issues and improve test coverage
Requiremen
ts:Experience in at least 2 DFT areas (Scan/ATPG/MBIST/BSCAN/GLS)
Strong understanding of DFT concepts and flow
Exposure to end-to-end DFT is a plus
skilled DFT (Design for Test) Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan, and a strong understanding of DFT methodologies.
The ideal candidate will contribute to DFT architecture, implementation, and validation, with the opportunity to work towards end-to-end DFT ownership across complex ASIC/SoC designs.
Show more Show less
Location: Mountain View, CA (Hybrid 3days/week)
Job Type: FTE/Permanent
Role Purpose
We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan
Key Responsibilitie
s:Work on Scan insertion, ATPG, GLS (timing/non-timing)
Implement MBIST and/or Boundary Scan (BSCAN, JTAG)
Support DFT architecture and chip-level integration
Debug DFT issues and improve test coverage
Requiremen
ts:Experience in at least 2 DFT areas (Scan/ATPG/MBIST/BSCAN/GLS)
Strong understanding of DFT concepts and flow
Exposure to end-to-end DFT is a plus
skilled DFT (Design for Test) Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan, and a strong understanding of DFT methodologies.
The ideal candidate will contribute to DFT architecture, implementation, and validation, with the opportunity to work towards end-to-end DFT ownership across complex ASIC/SoC designs.
Show more Show less