II
DFT Engineer
Accepting applicationsIntellectt Inc · Santa Clara, CA
Full-Time Mid_senior ATPGBoundary ScanDFTJTAGSoC
Posted
1d ago
Category
Test
Experience
Mid_senior
Country
United States
DFT Engineer
Location: Santa Clara, CA
Employment Type: Full-Time / Direct Hire
We are seeking a DFT Engineer with strong hands-on experience in DFT/DFx implementation and verification for semiconductor/SoC designs. The ideal candidate will have expertise with Siemens DFT tools, SCAN, SSN, MBIST, and IJTAG
.
Key Responsibiliti
esImplement DFT features including SCAN (with SSN) and MBIS
T.Perform MBIST repair implementation and verificatio
n.Generate test timing and Place & Route collatera
l.Work with IJTAG (IEEE 1687), including ICL and PDL specification
s.Verify DFT features including Boundary Scan, JTAG, SCAN, MBIST, and High-Speed I/
O.Collaborate with design, verification, and physical implementation team
s.Support DFT/DFx requirements throughout the SoC development lifecycl
e.
Required Qualificati
onsBachelor's degree (BE) in Electrical Engineering, Electronics Engineering, Computer Engineering, or related fie
ld.Hands-on experience with DFT/DFx methodologi
es.Experience with Siemens DFT/Tessent too
ls.Strong experience in SCAN, SSN, and MBI
ST.Experience with MBIST repair implementation and verificati
on.Knowledge of IJTAG / IEEE 1687, ICL, and P
DL.Experience verifying JTAG, Boundary Scan, SCAN, MBIST, and High-Speed I
/O.ATPG experience is not mandato
ry.Strong DFT/DFx implementation and verification skills preferr
ed.
Show more Show less
Location: Santa Clara, CA
Employment Type: Full-Time / Direct Hire
We are seeking a DFT Engineer with strong hands-on experience in DFT/DFx implementation and verification for semiconductor/SoC designs. The ideal candidate will have expertise with Siemens DFT tools, SCAN, SSN, MBIST, and IJTAG
.
Key Responsibiliti
esImplement DFT features including SCAN (with SSN) and MBIS
T.Perform MBIST repair implementation and verificatio
n.Generate test timing and Place & Route collatera
l.Work with IJTAG (IEEE 1687), including ICL and PDL specification
s.Verify DFT features including Boundary Scan, JTAG, SCAN, MBIST, and High-Speed I/
O.Collaborate with design, verification, and physical implementation team
s.Support DFT/DFx requirements throughout the SoC development lifecycl
e.
Required Qualificati
onsBachelor's degree (BE) in Electrical Engineering, Electronics Engineering, Computer Engineering, or related fie
ld.Hands-on experience with DFT/DFx methodologi
es.Experience with Siemens DFT/Tessent too
ls.Strong experience in SCAN, SSN, and MBI
ST.Experience with MBIST repair implementation and verificati
on.Knowledge of IJTAG / IEEE 1687, ICL, and P
DL.Experience verifying JTAG, Boundary Scan, SCAN, MBIST, and High-Speed I
/O.ATPG experience is not mandato
ry.Strong DFT/DFx implementation and verification skills preferr
ed.
Show more Show less
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