II
DFT Engineer
Accepting applicationsInfoObjects Inc. · San Jose, CA
Contract Entry ATPGBISTDFTJTAGSoC
Posted
7 May
Category
Test
Experience
Entry
Country
United States
Role: DFT Engineer
Location: San Jose CA (Day-1 Onsite) , 95110
Experience: 10+
Duration: 12 Months
Key Responsibilities:
DFT implementation, including Scan, ATPG, Sims, Post-Si diagnosis at block and SoC level
Verify test patterns using gate-level simulations.
Collaborate closely with Synthesis, STA and physical design to debug and resolve DFT-related problems.
Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.
Synopsys TetraMax, VCS, Verdi and DC/Fusion compiler work experience is must.
Preferred Qualification:
Strong understanding of industry standards and best practices in DFT - Scan, ATPG, JTAG.
Proven experience in developing DFT specifications and architectures for complex designs.
Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage
analysis, and more.
Proficiency in Synopsys for DFT implementation (DC), Vector generation (TetraMAX),
and verification (VCS and Verdi).
Ability to conduct experiments during silicon debug, effectively gather and analyze data
to identify root causes.
Efficient scripting skills using TCL for automating tasks and developing custom flows.
Show more Show less
Location: San Jose CA (Day-1 Onsite) , 95110
Experience: 10+
Duration: 12 Months
Key Responsibilities:
DFT implementation, including Scan, ATPG, Sims, Post-Si diagnosis at block and SoC level
Verify test patterns using gate-level simulations.
Collaborate closely with Synthesis, STA and physical design to debug and resolve DFT-related problems.
Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.
Synopsys TetraMax, VCS, Verdi and DC/Fusion compiler work experience is must.
Preferred Qualification:
Strong understanding of industry standards and best practices in DFT - Scan, ATPG, JTAG.
Proven experience in developing DFT specifications and architectures for complex designs.
Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage
analysis, and more.
Proficiency in Synopsys for DFT implementation (DC), Vector generation (TetraMAX),
and verification (VCS and Verdi).
Ability to conduct experiments during silicon debug, effectively gather and analyze data
to identify root causes.
Efficient scripting skills using TCL for automating tasks and developing custom flows.
Show more Show less