EV

DFT Engineer

Accepting applications

EZSpace Ventures · Bengaluru, Karnataka, India

Full-Time Associate ASICATPGDFTSoCVLSI
Posted
10 Jun
Category
Test
Experience
Associate
Country
India
Position: DFT Engineer (Design for Test)

Location: Bangalore

Experience: 3 – 5 Years

CTC: ₹12 LPA – ₹18 LPA

Employment Type: Full-Time

About The Role

Green Semiconductors Pvt Ltd is seeking a talented and motivated DFT Engineer to join our semiconductor design team. The ideal candidate will have hands-on experience in Design for Test (DFT) methodologies, scan insertion, ATPG DRC, and fault coverage analysis. Candidates with MBIST experience will be highly preferred.

Key Responsibilities

Implement and validate DFT architectures for complex ASIC/SoC designs.
Perform scan insertion and ensure design readiness for manufacturing tests.
Execute ATPG setup, DRC checks, pattern generation, and debugging.
Analyze and improve fault coverage to meet quality and testability targets.
Work on MBIST implementation, verification, and integration for memory testing.
Collaborate closely with Design, Verification, Physical Design, and Test teams.
Debug DFT-related issues and support silicon bring-up activities.
Develop and maintain DFT documentation, methodologies, and best practices.

Mandatory Skills

Strong experience in Design for Test (DFT).
Hands-on experience in Scan Insertion.
Expertise in ATPG DRC and test pattern generation.
Knowledge of Fault Coverage Analysis and optimization.
Good understanding of ASIC/SoC test methodologies.

Preferred Skills

Experience with MBIST (Memory Built-In Self-Test) implementation and validation.
Familiarity with industry-standard DFT and ATPG tools.
Understanding of semiconductor design flow and digital design concepts.
Strong debugging and problem-solving skills.

Qualifications

Bachelor's or Master's degree in Electronics Engineering, VLSI, Electrical Engineering, or a related field.
3–5 years of relevant experience in DFT engineering within the semiconductor industry.

What We're Looking For

Strong analytical and debugging capabilities.
Ability to work effectively in a fast-paced semiconductor development environment.
Excellent communication and teamwork skills.
Passion for delivering high-quality silicon products.

Location: Bangalore

Experience: 3–5 Years

Compensation: ₹12–18 LPA

If you have expertise in DFT methodologies, scan insertion, ATPG, and MBIST, we encourage you to apply and be part of our growing semiconductor innovation team.

Skills: automatic test pattern generation (atpg),dft,soc,scan insertion,design rule checking (drc)
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