Q
DFT DV Engineer
Accepting applicationsQTIMINDS · Bengaluru, Karnataka, India
Full-Time Entry Boundary ScanDFTJTAGSoCSystemVerilog
Estimated market salary
₹10-17 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
21h ago
Category
Verification
Experience
Entry
Country
India
DFX DV Engineer (Design-for-X Verification)
Experience: 3 Years
location: Bangalore
immediate joiners only
Responsibilities
· Verify DFX features including Scan, MBIST, LBIST, JTAG, Boundary Scan, and Debug logic.
· Develop verification environments using UVM/SystemVerilog.
· Perform functional and assertion-based verification.
· Execute regression and coverage closure activities.
· Debug DFX-related failures.
Required Skills
· UVM, SystemVerilog.
· DFT verification methodologies.
· Functional coverage and assertions.
· SoC verification experience.
· Scripting skills.
Preferred
· Experience with emulation and formal verification.
· Knowledge of IEEE 1149.x standards.
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Experience: 3 Years
location: Bangalore
immediate joiners only
Responsibilities
· Verify DFX features including Scan, MBIST, LBIST, JTAG, Boundary Scan, and Debug logic.
· Develop verification environments using UVM/SystemVerilog.
· Perform functional and assertion-based verification.
· Execute regression and coverage closure activities.
· Debug DFX-related failures.
Required Skills
· UVM, SystemVerilog.
· DFT verification methodologies.
· Functional coverage and assertions.
· SoC verification experience.
· Scripting skills.
Preferred
· Experience with emulation and formal verification.
· Knowledge of IEEE 1149.x standards.
Show more Show less