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Design Verification Manager
Accepting applicationsScaleFlux · Bangalore Urban, Karnataka, India
Full-Time Mid_senior ARMASICFPGAI2CMentor
Estimated market salary
₹27-49 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
India
Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Design Verification Manager taking on IP and SoC level verification challenges.
As a Verification Manager with a focus on verification of multi-core, complex, high-performance ASIC, you will work to understand the internal requirements and complexities of our SOC and work with the DV team to provide verification environment and solutions. You will help lead technically and people management wise to design the SoC and IP verification methodology, environment, test plan and tests. You will also work with design team to make sure that high quality verification is achieved for first pass success of SoC.
Location: Bangalore.
Qualifications and Skillset Requirements
Minimum BE/BS degree (Masters preferred) in Electrical/Electronics Engineering with 12+ years of practical experience
Strong fundamentals in digital ASIC design and verification
Experience in leading and managing the design verification team
Strong in DV Methodology and process
Must be Technically hands on
Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC
Strong experience with Verilog, System Verilog, UVM and/or other
Expertise in ARM cores and related infrastructure (like Coresight, NIC/NOC, other bus interconnects etc.) is highly desirable
Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART and experience in SSD is highly desirable
Understanding of IP designs and verification requirements
Understanding of Gate Level Simulations (GLS) with timing and related debug capability
Excellent communication and leadership quality to technically mentor and lead a team of verification engineers
Roles And Responsibilities
Lead and Manage DV team
Define and develop verification architecture, methodology, environment and test plans driven by functional coverage
Hands on contribute to IP and SoC verification, process and environment creation
Work closely with design team for continuous improvement of design quality through verification
Review the test plans, verification tests and coverage for other team members
Mentor team members for technical growth in verification
Establish process of verification and quality improvements
Contribute on GLS, emulation, FPGA based and Post Si validation
Show more Show less
As a Verification Manager with a focus on verification of multi-core, complex, high-performance ASIC, you will work to understand the internal requirements and complexities of our SOC and work with the DV team to provide verification environment and solutions. You will help lead technically and people management wise to design the SoC and IP verification methodology, environment, test plan and tests. You will also work with design team to make sure that high quality verification is achieved for first pass success of SoC.
Location: Bangalore.
Qualifications and Skillset Requirements
Minimum BE/BS degree (Masters preferred) in Electrical/Electronics Engineering with 12+ years of practical experience
Strong fundamentals in digital ASIC design and verification
Experience in leading and managing the design verification team
Strong in DV Methodology and process
Must be Technically hands on
Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC
Strong experience with Verilog, System Verilog, UVM and/or other
Expertise in ARM cores and related infrastructure (like Coresight, NIC/NOC, other bus interconnects etc.) is highly desirable
Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART and experience in SSD is highly desirable
Understanding of IP designs and verification requirements
Understanding of Gate Level Simulations (GLS) with timing and related debug capability
Excellent communication and leadership quality to technically mentor and lead a team of verification engineers
Roles And Responsibilities
Lead and Manage DV team
Define and develop verification architecture, methodology, environment and test plans driven by functional coverage
Hands on contribute to IP and SoC verification, process and environment creation
Work closely with design team for continuous improvement of design quality through verification
Review the test plans, verification tests and coverage for other team members
Mentor team members for technical growth in verification
Establish process of verification and quality improvements
Contribute on GLS, emulation, FPGA based and Post Si validation
Show more Show less