T
Design Verification Engineer
Accepting applicationsTessolve · Bhubaneswar, Odisha, India
Full-Time Mid_senior DDREthernetPCIePerlPython
Posted
1d ago
Category
Verification
Experience
Mid_senior
Country
India
Hello ,
Please find the below JD for IP and SOC.
IP / SoC Verification Engineer – High-Speed Protocols
Experience: 4–10Years
Location: Bhubaneswar, Odisha, India
Company: Tessolve Semiconductor
We are looking for experienced IP / SoC Verification Engineers with strong hands-on exposure to high-speed interface protocols to join our growing verification teams.
Key Responsibilities
IP and SoC level functional verification
Development of SystemVerilog / UVM-based verification environments
Verification of high-speed protocols
Testbench development, test creation, and execution
Debugging simulation failures and protocol issues
Functional, code, and assertion coverage closure
Collaboration with design, architecture, and validation teams
Support regression, reviews, and verification sign-off
Mandatory Skills
4–10 years of experience in IP / SoC Verification
Strong hands-on experience with SystemVerilog & UVM
Experience with one or more high-speed protocols:
PCIe, USB, Ethernet, DDR, MIPI (CSI/DSI), SATA, HDMI, DisplayPort
Good understanding of SoC fundamentals (clocking, resets, interconnects)
Experience with assertion-based verification (SVA)
Strong debugging and problem-solving skills
Good to Have
VIP integration and customization experience
Low-power verification knowledge (UPF/CPF)
Scripting skills (Python / Perl / Shell)
Experience mentoring junior engineers
Show more Show less
Please find the below JD for IP and SOC.
IP / SoC Verification Engineer – High-Speed Protocols
Experience: 4–10Years
Location: Bhubaneswar, Odisha, India
Company: Tessolve Semiconductor
We are looking for experienced IP / SoC Verification Engineers with strong hands-on exposure to high-speed interface protocols to join our growing verification teams.
Key Responsibilities
IP and SoC level functional verification
Development of SystemVerilog / UVM-based verification environments
Verification of high-speed protocols
Testbench development, test creation, and execution
Debugging simulation failures and protocol issues
Functional, code, and assertion coverage closure
Collaboration with design, architecture, and validation teams
Support regression, reviews, and verification sign-off
Mandatory Skills
4–10 years of experience in IP / SoC Verification
Strong hands-on experience with SystemVerilog & UVM
Experience with one or more high-speed protocols:
PCIe, USB, Ethernet, DDR, MIPI (CSI/DSI), SATA, HDMI, DisplayPort
Good understanding of SoC fundamentals (clocking, resets, interconnects)
Experience with assertion-based verification (SVA)
Strong debugging and problem-solving skills
Good to Have
VIP integration and customization experience
Low-power verification knowledge (UPF/CPF)
Scripting skills (Python / Perl / Shell)
Experience mentoring junior engineers
Show more Show less