SU
Design Verification Engineer
Accepting applicationsSocionext US · Milpitas, CA
Full-Time Mid_senior ASICFPGARTLUVMVerilog
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
United States
Design Verification Engineer–SNA – Milpitas, CA
Description
Socionext Inc. (SNI) is an innovative enterprise that designs, develops and delivers System-on-Chip solutions to customers worldwide. The company is focused on AR/VR, ADAS, imaging, datacenter networking, storage and other dynamic technologies that drive today’s leading-edge applications. Founded in 2015, Socionext Inc. is headquartered in Yokohama, and has offices in Japan, Asia, United States and Europe to lead its product development and sales activities. Socionext America Inc. (SNA), a wholly owned subsidiary of SNI.
Socionext is seeking a Design Verification Engineer. The role is technical, hands-on, for new silicon projects and developments. We are looking for an experienced professional with Passion& Drive to succeed.
The role will be Hybrid an
Primary Responsibilities Include:
Work as a team with a global workforce.
Responsible for verification of ASIC designs \
Design Verification – Implement test benches in UVM and System Verilog, run regressions at RTL and gate level, generate and report DV metrics with respect to bug tracking and code coverage,debug failures and providefeedback to the designteam.
Setup Verification Regression suites, RTL Level & Corresponding NetlistLevel after Synthesis to test any/all Cornercase conditions.
NecessaryQualifications:
BS or MS in ComputerScience or Electrical Engineering.
5-10+ years of industry experience bringing silicon ICs into high volume production.
Must have strong experience with UVM.
Must have a full chip verification experience
Lead at least one project from concept to completion
Knowledge of industry standard interfaces. Extensive Familiarity with Verilog, Simulation tools & demonstrated ability to debug Problems & Troubleshoot in Real Time.
Sound knowledge of ARMv8/9, interconnect, memory coherence and memory architecture
Familiarity with Formality & popular Verification Tools. (Key knowledge should include such topics as: IP validation, Gate level verification, FPGA Validation, Emulation, Silicon Validation, Reference Board bring up verification, Silicon Bring up, DFx, Low Power Verification)
Experience in working with scripting languages to automate the Verification
Experience with C-based tests
Functional understanding of constrained random verification process, functional coverage,and code coverage.
Low power verification aspects
Team player with excellent communication skills and the desireto take on diverse challenges.
Comfortable with Customer interaction
Desirable:
Secure boot, SecureJTAG
Show more Show less
Description
Socionext Inc. (SNI) is an innovative enterprise that designs, develops and delivers System-on-Chip solutions to customers worldwide. The company is focused on AR/VR, ADAS, imaging, datacenter networking, storage and other dynamic technologies that drive today’s leading-edge applications. Founded in 2015, Socionext Inc. is headquartered in Yokohama, and has offices in Japan, Asia, United States and Europe to lead its product development and sales activities. Socionext America Inc. (SNA), a wholly owned subsidiary of SNI.
Socionext is seeking a Design Verification Engineer. The role is technical, hands-on, for new silicon projects and developments. We are looking for an experienced professional with Passion& Drive to succeed.
The role will be Hybrid an
Primary Responsibilities Include:
Work as a team with a global workforce.
Responsible for verification of ASIC designs \
Design Verification – Implement test benches in UVM and System Verilog, run regressions at RTL and gate level, generate and report DV metrics with respect to bug tracking and code coverage,debug failures and providefeedback to the designteam.
Setup Verification Regression suites, RTL Level & Corresponding NetlistLevel after Synthesis to test any/all Cornercase conditions.
NecessaryQualifications:
BS or MS in ComputerScience or Electrical Engineering.
5-10+ years of industry experience bringing silicon ICs into high volume production.
Must have strong experience with UVM.
Must have a full chip verification experience
Lead at least one project from concept to completion
Knowledge of industry standard interfaces. Extensive Familiarity with Verilog, Simulation tools & demonstrated ability to debug Problems & Troubleshoot in Real Time.
Sound knowledge of ARMv8/9, interconnect, memory coherence and memory architecture
Familiarity with Formality & popular Verification Tools. (Key knowledge should include such topics as: IP validation, Gate level verification, FPGA Validation, Emulation, Silicon Validation, Reference Board bring up verification, Silicon Bring up, DFx, Low Power Verification)
Experience in working with scripting languages to automate the Verification
Experience with C-based tests
Functional understanding of constrained random verification process, functional coverage,and code coverage.
Low power verification aspects
Team player with excellent communication skills and the desireto take on diverse challenges.
Comfortable with Customer interaction
Desirable:
Secure boot, SecureJTAG
Show more Show less