SP
Design Verification Engineer
Accepting applicationsSilicon Patterns · Bengaluru, Karnataka, India
Full-Time Mid_senior CadenceDDRFPGAMentorPCIe
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
India
Job Title: Design Verification Engineer – PCIe
Job Summary
We are seeking a skilled Design Verification Engineer with strong experience in PCIe protocol verification. The candidate will be responsible for verifying high-speed IPs/SoCs, ensuring compliance with PCIe specifications, and building robust verification environments using industry-standard methodologies.
Key Responsibilities
Develop and execute verification plans for PCIe IP/SoC components
Build and maintain UVM/SystemVerilog-based verification environments
Create reusable testbenches, sequences, scoreboards, and checkers
Design and execute directed and constrained-random testcases
Perform functional and code coverage closure
Debug simulation failures and identify root causes in RTL or testbench
Validate compliance with PCIe specifications (Gen1/Gen2/Gen3/Gen4/Gen5)
Work closely with design, architecture, and physical design teams
Develop assertions and perform formal/ABV (Assertion-Based Verification) where applicable
Support post-silicon validation teams with testcases and debug insights
Required Skills
Strong knowledge of PCIe architecture and protocol layers:
Transaction Layer (TLP)
Data Link Layer (DLLP)
Physical Layer (LTSSM, equalization, etc.)
Expertise in SystemVerilog and UVM
Experience in functional verification of high-speed interfaces
Solid understanding of:
Assertions (SVA)
Coverage-driven verification methodology
Hands-on experience with simulators (VCS, Questa, Xcelium)
Debug skills with waveform tools (Verdi, SimVision, DVE)
Knowledge of protocol checkers and VIPs (Synopsys/Cadence/Mentor)
Good to Have
Experience with PCIe VIP integration and customization
Knowledge of AXI, CXL, DDR, or other high-speed protocols
Exposure to emulation or FPGA prototyping
Experience in post-silicon validation
Scripting skills (Python, Perl, Shell)
Familiarity with CI/CD flows and regression automation
Qualifications
Bachelor’s/Master’s degree in Electronics/Electrical/Computer Engineering
5–10 years of experience in design verification
Proven experience in PCIe verification projects
Key Competencies
Strong problem-solving and debugging skills
Attention to detail in protocol compliance
Ability to work in fast-paced semiconductor environments
Good communication and teamwork skills
Show more Show less
Job Summary
We are seeking a skilled Design Verification Engineer with strong experience in PCIe protocol verification. The candidate will be responsible for verifying high-speed IPs/SoCs, ensuring compliance with PCIe specifications, and building robust verification environments using industry-standard methodologies.
Key Responsibilities
Develop and execute verification plans for PCIe IP/SoC components
Build and maintain UVM/SystemVerilog-based verification environments
Create reusable testbenches, sequences, scoreboards, and checkers
Design and execute directed and constrained-random testcases
Perform functional and code coverage closure
Debug simulation failures and identify root causes in RTL or testbench
Validate compliance with PCIe specifications (Gen1/Gen2/Gen3/Gen4/Gen5)
Work closely with design, architecture, and physical design teams
Develop assertions and perform formal/ABV (Assertion-Based Verification) where applicable
Support post-silicon validation teams with testcases and debug insights
Required Skills
Strong knowledge of PCIe architecture and protocol layers:
Transaction Layer (TLP)
Data Link Layer (DLLP)
Physical Layer (LTSSM, equalization, etc.)
Expertise in SystemVerilog and UVM
Experience in functional verification of high-speed interfaces
Solid understanding of:
Assertions (SVA)
Coverage-driven verification methodology
Hands-on experience with simulators (VCS, Questa, Xcelium)
Debug skills with waveform tools (Verdi, SimVision, DVE)
Knowledge of protocol checkers and VIPs (Synopsys/Cadence/Mentor)
Good to Have
Experience with PCIe VIP integration and customization
Knowledge of AXI, CXL, DDR, or other high-speed protocols
Exposure to emulation or FPGA prototyping
Experience in post-silicon validation
Scripting skills (Python, Perl, Shell)
Familiarity with CI/CD flows and regression automation
Qualifications
Bachelor’s/Master’s degree in Electronics/Electrical/Computer Engineering
5–10 years of experience in design verification
Proven experience in PCIe verification projects
Key Competencies
Strong problem-solving and debugging skills
Attention to detail in protocol compliance
Ability to work in fast-paced semiconductor environments
Good communication and teamwork skills
Show more Show less
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