SJ
Design Verification Engineer
Accepting applicationsSelby Jennings · New York, NY
Full-Time Mid_senior AIASICC++FPGAPython
Posted
19h ago
Category
Design
Experience
Mid_senior
Country
United States
Locations: Austin, TX | Chicago, IL | New York, NY | Boulder, CO
We're partnering with a leading technology-driven trading firm that designs high-performance compute platforms used in real-time production environments. The hardware organization develops custom FPGA and ASIC solutions.
The team is seeking Design Verification Engineers want meaningful ownership over verification methodology, automation, tooling, and infrastructure. You'll work closely with hardware designers to ensure the correctness and robustness of critical systems operating under demanding performance constraints.
This is a highly collaborative engineering environment where verification engineers do far more than execute test plans. Team members help shape verification frameworks, improve tooling, drive coverage closure, and contribute to the overall development process.
What You'll Do
Develop SystemVerilog/UVM testbenches and verification environments
Create and execute verification plans for complex RTL designs
Drive code and functional coverage analysis and closure
Debug and root-cause RTL issues in collaboration with design engineers
Develop automation, tooling, and verification infrastructure using Python
Manage regressions and CI workflows
Improve verification methodologies and overall engineering efficiency
Support verification activities across FPGA, ASIC, SoC, networking, and accelerator-based hardware platforms
What We're Looking For
3+ years of professional RTL functional verification experience
Strong SystemVerilog experiene
Strong UVM experience (required)
Strong Python programming skills (required)
Experience building or maintaining testbenches and verification environments
Comfortable working in Linux environments
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Experience with ASIC, SoC, GPU/Graphics, CPU, AI/ML accelerator, networking silicon, or FPGA verification
Experience with Verilator and/or Cocotb
Experience with C++
Experience developing verification frameworks, tooling, or automation
Experience with CI/CD, regression infrastructure, or verification productivity improvements
Engineers from FPGA, ASIC, SoC, GPU, graphics, CPU, or accelerator backgrounds
Career Growth
The team is hiring individual contributors ranging from early-career engineers to experienced senior engineers. Candidates with leadership backgrounds are welcome, though this position is currently structured as a hands-on technical IC role rather than a people-management opportunity.
Compensation
Competitive base salary, annual performance bonus, and comprehensive benefits package. Compensation is highly dependent on experience, technical depth, and location.
Show more Show less
We're partnering with a leading technology-driven trading firm that designs high-performance compute platforms used in real-time production environments. The hardware organization develops custom FPGA and ASIC solutions.
The team is seeking Design Verification Engineers want meaningful ownership over verification methodology, automation, tooling, and infrastructure. You'll work closely with hardware designers to ensure the correctness and robustness of critical systems operating under demanding performance constraints.
This is a highly collaborative engineering environment where verification engineers do far more than execute test plans. Team members help shape verification frameworks, improve tooling, drive coverage closure, and contribute to the overall development process.
What You'll Do
Develop SystemVerilog/UVM testbenches and verification environments
Create and execute verification plans for complex RTL designs
Drive code and functional coverage analysis and closure
Debug and root-cause RTL issues in collaboration with design engineers
Develop automation, tooling, and verification infrastructure using Python
Manage regressions and CI workflows
Improve verification methodologies and overall engineering efficiency
Support verification activities across FPGA, ASIC, SoC, networking, and accelerator-based hardware platforms
What We're Looking For
3+ years of professional RTL functional verification experience
Strong SystemVerilog experiene
Strong UVM experience (required)
Strong Python programming skills (required)
Experience building or maintaining testbenches and verification environments
Comfortable working in Linux environments
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Experience with ASIC, SoC, GPU/Graphics, CPU, AI/ML accelerator, networking silicon, or FPGA verification
Experience with Verilator and/or Cocotb
Experience with C++
Experience developing verification frameworks, tooling, or automation
Experience with CI/CD, regression infrastructure, or verification productivity improvements
Engineers from FPGA, ASIC, SoC, GPU, graphics, CPU, or accelerator backgrounds
Career Growth
The team is hiring individual contributors ranging from early-career engineers to experienced senior engineers. Candidates with leadership backgrounds are welcome, though this position is currently structured as a hands-on technical IC role rather than a people-management opportunity.
Compensation
Competitive base salary, annual performance bonus, and comprehensive benefits package. Compensation is highly dependent on experience, technical depth, and location.
Show more Show less