R

Design Verification Engineer

Accepting applications

RIIM · Austin, TX

Contract Mid_senior ARMEthernetPERLPythonUVM
Posted
20h ago
Category
Verification
Experience
Mid_senior
Country
United States
Strong System Verilog/UVM knowledge with practical experience on live projects Expertise in AMBA bus protocols, ARM CPU, and experience in PCI Express and/or Ethernet bus protocols (desirable) ·
Proficiency in Unix, Configuration Management, Bug tracking, and verification dashboarding tools ·
Experience in developing functional verification environments, including components like monitors, checkers, scoreboards, and assertions, along with knowledge of verification methodologies using random stimulus and functional coverage.


Preferred Skills:

·
Proficiency in scripting languages such as PERL, Python, Shell, or Makefi
leDemonstrated ability in debugging and problem-solving Excellent communication skills with a collaborative and team-oriented mindse

t.
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