Design Verification Engineer

Role – Design Verification Engineer
Location – - Remote

Job Description and other details –
Qualifications
B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
3+ years of experience in ASIC/SoC verification.
Solid understanding of SystemVerilog, digital logic, and hardware verification flows.
Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision) and coverage tool.
Experience with test planning, testbench development, constrained-random testing, and coverage analysis.
Familiarity with a scripting language (ex: Python, Perl, TCL) and revision control system (ex: Git).












We are an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, sexual orientation, or gender identity), national origin, citizenship status, age, disability, genetic information, protected veteran status, or any other characteristic protected by applicable law. https://www.e-verify.gov/sites/default/files/everify/posters/IER_RighttoWorkPoster.pdf
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