PT
Design Verification Engineer ASIC
Accepting applicationsPQAngels Technologies Pvt. Ltd. · Bengaluru, Karnataka, India
Full-Time Mid_senior ASICDDRPCIEPythonRTL
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
India
Company Description :
PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions.
Role Description :
The ASIC Design Verification Engineer – PQAngels will be responsible for verifying complex ASIC designs using industry-standard methodologies and tools. Day-to-day activities include developing verification plans, creating and maintaining test benches, writing test cases, performing functional and formal verification, and analyzing coverage metrics. The role involves close collaboration with RTL design engineers and architects to understand specifications, identify corner cases, and debug design and verification issues. The engineer will document findings, contribute to process improvements, and ensure that designs meet performance, reliability, and quality requirements. This is a full-time, on-site role based in the Greater Bengaluru Area.
Requirements
Key Responsibilities :
Develop verification plans.
Build reusable UVM environments.
Functional coverage closure.
Assertions and debugging.
Regression execution.
Testbench development.
Root cause analysis.
Protocol verification.
Customer interactions.
Documentation.
Verification sign off activities.
Collaborate with RTL and PD teams.
Mandatory Technical Skills :
SystemVerilog
UVM
SVA
Functional Coverage
Protocol Verification
Python/TCL EDA Tools
VCS
Xcelium
QuestaSim
Verdi
PCIE ,DDR, USB, UCIE ASIC or SoC projects
Qualifications :
Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.
Benefits
Competitive compensation
Learning & career growth
Exposure to global semiconductor projects
Collaborative work environment
Opportunities to work on cutting-edge technologies
Continuous technical learning
Show more Show less
PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions.
Role Description :
The ASIC Design Verification Engineer – PQAngels will be responsible for verifying complex ASIC designs using industry-standard methodologies and tools. Day-to-day activities include developing verification plans, creating and maintaining test benches, writing test cases, performing functional and formal verification, and analyzing coverage metrics. The role involves close collaboration with RTL design engineers and architects to understand specifications, identify corner cases, and debug design and verification issues. The engineer will document findings, contribute to process improvements, and ensure that designs meet performance, reliability, and quality requirements. This is a full-time, on-site role based in the Greater Bengaluru Area.
Requirements
Key Responsibilities :
Develop verification plans.
Build reusable UVM environments.
Functional coverage closure.
Assertions and debugging.
Regression execution.
Testbench development.
Root cause analysis.
Protocol verification.
Customer interactions.
Documentation.
Verification sign off activities.
Collaborate with RTL and PD teams.
Mandatory Technical Skills :
SystemVerilog
UVM
SVA
Functional Coverage
Protocol Verification
Python/TCL EDA Tools
VCS
Xcelium
QuestaSim
Verdi
PCIE ,DDR, USB, UCIE ASIC or SoC projects
Qualifications :
Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams.
Benefits
Competitive compensation
Learning & career growth
Exposure to global semiconductor projects
Collaborative work environment
Opportunities to work on cutting-edge technologies
Continuous technical learning
Show more Show less