QG
Design Verification Engineer (12+ years )
Accepting applicationsQuest Global · San Jose, CA
Full-Time Entry AIASICC++PerlPython
Posted
23h ago
Category
Verification
Experience
Entry
Country
United States
Company Description
Quest Global, headquartered in Singapore, provides world-class end-to-end engineering solutions, leveraging deep industry knowledge and digital expertise. Operating in 18 countries with 84 delivery centers, Quest Global solves complex challenges across diverse industries including aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor. With over 21,000 employees, we strive to be the most trusted partner for the world's toughest engineering problems. Integrity is vital to us, and we do not request payments during the recruitment process.
Design Verification Engineer Responsibilities:
Work with researchers and architects defining verification plans for each of the different core IP
Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
Minimum Qualifications:
8+ years ASIC development cycle industry experience
8+ years of hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology
5+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Preferred Qualifications:
Experience in development of UVM based verification environments from scratch
Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
Experience with revision control systems like Mercurial(Hg), Git or SVN
Experience with low power design
Master's degree in Computer Science, Computer Engineering, or a related field
Show more Show less
Quest Global, headquartered in Singapore, provides world-class end-to-end engineering solutions, leveraging deep industry knowledge and digital expertise. Operating in 18 countries with 84 delivery centers, Quest Global solves complex challenges across diverse industries including aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor. With over 21,000 employees, we strive to be the most trusted partner for the world's toughest engineering problems. Integrity is vital to us, and we do not request payments during the recruitment process.
Design Verification Engineer Responsibilities:
Work with researchers and architects defining verification plans for each of the different core IP
Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
Minimum Qualifications:
8+ years ASIC development cycle industry experience
8+ years of hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology
5+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Preferred Qualifications:
Experience in development of UVM based verification environments from scratch
Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
Experience with revision control systems like Mercurial(Hg), Git or SVN
Experience with low power design
Master's degree in Computer Science, Computer Engineering, or a related field
Show more Show less
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