SL
Design Engineer I - Modem Design
Accepting applicationsSilicon Labs · Austin, TX
Full-Time Mid ASICFPGAMATLABPythonRTL
Posted
2d ago
Category
Design
Experience
Mid
Country
United States
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.
Meet the Team
You’ll join the PHYMAC MODEM team, which designs digital components of Silicon Labs’ low-power wireless products. Our team focuses on building efficient, high-performance digital systems that enable wireless connectivity across applications such as smart home, industrial IoT, and smart cities. By working at the intersection of digital design and wireless systems, the team plays a critical role in advancing the future of connected devices.
Responsibilities
Design, model, and verify digital blocks for low-power wireless products.
Develop RTL implementations and verification environments to ensure functionality, performance, and quality.
Collaborate with cross-functional teams to translate wireless system requirements into efficient digital architectures and implementations.
Debug and resolve design and verification issues throughout the development cycle.
Contribute to the integration, bring-up, and validation of digital modules within larger system-on-chip (SoC) designs.
Develop scripts and tools to improve design, verification, and testing efficiency.
Document design decisions, verification results, and technical findings, and present work to the broader engineering team.
Skills You Need
Minimum Qualifications
Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
Experience with RTL design using Verilog and/or SystemVerilog.
Experience with digital design simulation and verification methodologies and tools.
Understanding of digital design fundamentals, including synchronous design, state machines, timing, and logic optimization.
Basic programming skills in Python, MATLAB, or a similar language for automation, testing, or data analysis.
The Following Qualifications Will Be Considered a Plus
Knowledge of Digital Signal Processing (DSP) concepts and digital communications systems.
Experience with MATLAB modeling for DSP and wireless communication algorithms.
RTL design and verification experience using Verilog/SystemVerilog and Questa tools.
Familiarity with wireless communication standards such as Bluetooth Low Energy, Zigbee, Thread, Wi-Fi, or proprietary wireless protocols.
Experience with FPGA development, hardware bring-up, or lab-based debugging.
Exposure to ASIC or SoC design flows, including synthesis, linting, CDC analysis, or formal verification.
Benefits & Perks
You can look forward to the following benefits:
Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
Highly competitive salary
401k plan with match and Roth plan option
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-Up childcare
Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
Flexible PTO schedule
3 paid volunteer days per year
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks
Monthly company updates with our CEO
The annualized base pay range for this role is expected to be between $78,750 - $146,250 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.
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Meet the Team
You’ll join the PHYMAC MODEM team, which designs digital components of Silicon Labs’ low-power wireless products. Our team focuses on building efficient, high-performance digital systems that enable wireless connectivity across applications such as smart home, industrial IoT, and smart cities. By working at the intersection of digital design and wireless systems, the team plays a critical role in advancing the future of connected devices.
Responsibilities
Design, model, and verify digital blocks for low-power wireless products.
Develop RTL implementations and verification environments to ensure functionality, performance, and quality.
Collaborate with cross-functional teams to translate wireless system requirements into efficient digital architectures and implementations.
Debug and resolve design and verification issues throughout the development cycle.
Contribute to the integration, bring-up, and validation of digital modules within larger system-on-chip (SoC) designs.
Develop scripts and tools to improve design, verification, and testing efficiency.
Document design decisions, verification results, and technical findings, and present work to the broader engineering team.
Skills You Need
Minimum Qualifications
Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
Experience with RTL design using Verilog and/or SystemVerilog.
Experience with digital design simulation and verification methodologies and tools.
Understanding of digital design fundamentals, including synchronous design, state machines, timing, and logic optimization.
Basic programming skills in Python, MATLAB, or a similar language for automation, testing, or data analysis.
The Following Qualifications Will Be Considered a Plus
Knowledge of Digital Signal Processing (DSP) concepts and digital communications systems.
Experience with MATLAB modeling for DSP and wireless communication algorithms.
RTL design and verification experience using Verilog/SystemVerilog and Questa tools.
Familiarity with wireless communication standards such as Bluetooth Low Energy, Zigbee, Thread, Wi-Fi, or proprietary wireless protocols.
Experience with FPGA development, hardware bring-up, or lab-based debugging.
Exposure to ASIC or SoC design flows, including synthesis, linting, CDC analysis, or formal verification.
Benefits & Perks
You can look forward to the following benefits:
Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
Highly competitive salary
401k plan with match and Roth plan option
Equity rewards (RSUs)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-Up childcare
Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
Flexible PTO schedule
3 paid volunteer days per year
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks
Monthly company updates with our CEO
The annualized base pay range for this role is expected to be between $78,750 - $146,250 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.
Show more Show less