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Delivery Manager II
Accepting applicationsUST · Bengaluru, Karnataka, India
Full-Time Principal AIASICAnalogDDREthernet
Estimated market salary
₹18-33 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Verification
Experience
Principal
Country
India
Role Description
UST Title- Delivery Manager II
Who We Are
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
Summary
The Practice Head – Design Verification (DV) will lead and scale UST's Design Verification practice by driving business growth, delivery excellence, capability development, talent strategy, and customer success across ASIC, SoC, IP, and subsystem verification engagements. This leadership role combines deep technical expertise with strong business acumen to build a differentiated verification practice and establish UST as a trusted partner for global semiconductor customers.
The Opportunity
UST is looking for a Practice Head – Design Verification (DV) to build, scale, and lead its Design Verification practice. The ideal candidate will own the practice strategy, P&L, customer engagement, solution development, and organizational growth while driving innovation and delivery excellence across semiconductor verification services.
Key Roles & Responsibilities
Practice Growth & Business Development
ø Own DV practice P&L, revenue, margins, and growth targets.
ø Develop and execute a 3-year practice growth strategy.
ø Work closely with sales, account managers, and delivery leaders to identify and pursue opportunities.
ø Participate in customer meetings, solution discussions, and RFP/RFQ responses.
ø Build strategic relationships with semiconductor customers globally.
ø Drive mining of existing accounts and acquisition of new logos.
ø KPIs, Revenue growth, New customer acquisitions, Pipeline generation, Conversion rate and Gross margin
Capability Building
Define And Build Capabilities In
ø Functional Verification
ø UVM
ø SystemVerilog
ø Assertion-Based Verification (ABV)
ø Coverage-Driven Verification
ø Advanced Verification
ø Formal Verification
ø Emulation
ø FPGA Prototyping
ø Portable Stimulus
ø SoC Verification
ø Subsystem Verification
ø Integration Verification
ø Performance Verification
ø Low Power Verification (UPF)
ø Protocol Expertise
ø PCIe
ø USB
ø Ethernet
ø DDR
ø MIPI
ø CXL
ø UCIe
ø AMBA AXI/AHB/APB
ø AMS Verification
ø Mixed Signal Verification
ø Real Number Modeling
ø KPIs
ø Number of certified engineers
ø New capability launches
ø Reusable verification IPs developed
Delivery Excellence
ø Ensure successful execution of all DV projects.
ø Establish delivery governance and review mechanisms.
ø Improve productivity through reusable methodologies and automation.
ø Ensure customer satisfaction and delivery quality.
ø Drive predictable project execution.
ø KPIs
ø Customer satisfaction score
ø On-time delivery
ø Defect leakage
ø Resource utilization
ø Repeat business
Talent Strategy & Organization Development
ø Build a strong DV talent pipeline.
ø Define hiring strategy and workforce planning.
ø Drive competency development and career progression.
ø Mentor senior technical leaders and architects.
ø Improve employee retention and engagement.
ø KPIs
ø Headcount growth
ø Attrition
ø Internal promotions
ø Training hours per employee
Solution & IP Development
ø Build reusable verification frameworks and accelerators.
ø Develop differentiated solutions for target markets.
ø Create Offerings Around
ø SoC Verification
ø IP Verification
ø AMS Verification
ø Formal Verification
ø Emulation
ø KPIs
ø Reusable assets created
ø Productivity improvement
ø Solution-led wins
Industry Thought Leadership
ø Represent the company in semiconductor forums and conferences.
ø Publish technical papers and white papers.
ø Build partnerships with EDA vendors and ecosystem players.
ø KPIs
ø Conference presentations
ø White papers published
ø Strategic partnerships
ø Preferred Experience
ø 18+ years in semiconductor industry.
ø 8+ years leading large verification teams.
What You Need
Proven leadership experience in building and scaling Design Verification organizations within a semiconductor services environment.
Strong business development, customer engagement, and practice management capabilities with ownership of revenue and profitability.
Experience managing large global delivery teams and driving operational excellence.
Demonstrated success in developing reusable IPs, accelerators, and differentiated verification solutions.
Ability to build high-performing engineering teams and mentor senior technical leaders.
Strong stakeholder management and executive communication skills.
Required Skills
Functional Verification
SystemVerilog
Universal Verification Methodology (UVM)
Assertion-Based Verification (ABV)
Coverage-Driven Verification
SoC, Subsystem, and IP Verification
Integration and Performance Verification
Formal Verification
Emulation
FPGA Prototyping
Portable Stimulus
Low Power Verification (UPF)
AMS and Mixed Signal Verification
Real Number Modeling (RNM)
Protocol Verification including PCIe, USB, Ethernet, DDR, MIPI, CXL, UCIe, and AMBA (AXI/AHB/APB)
Practice P&L Management
Business Development and Customer Relationship Management
Delivery Governance and Quality Management
Talent Development and Organization Building
Desired Skills
Experience driving verification practice growth within a semiconductor services organization.
Expertise in Automotive SoC Verification and AI SoC Verification.
Experience developing reusable verification IPs, frameworks, and accelerators.
Strong partnerships with EDA vendors and semiconductor ecosystem players.
Experience presenting at industry conferences and publishing technical papers or white papers.
Proven ability to build scalable engineering organizations of 500+ engineers.
Educational Qualification
B.E./B.Tech/M.E./M.Tech in Electronics, ECE, Electrical Engineering, or related disciplines.
Success Metrics for First 12 Months
Area
Target
Revenue Growth
25-40%
New Customers
3-5
Pipeline Creation
3X annual target
Delivery CSAT
>4.5/5
Headcount Growth
20-30%
New Offerings
3-5
Strategic Partnerships
2-3
What Good Looks Like After 1 Year
The DV Practice Head Has
ø A clearly differentiated verification practice.
ø Strong customer connect with top semiconductor companies such as AMD, Analog Devices, NVIDIA, Qualcomm and others.
ø A healthy talent pyramid.
ø Strong protocol and SoC verification capabilities.
ø Predictable revenue growth and delivery excellence.
ø A leadership bench capable of scaling the practice beyond 500+ engineers.
ø For UST specifically, I would recommend adding explicit ownership for AMS Verification, Formal Verification, Emulation, and Automotive/AI SoC verification, as these areas can become strong differentiators in the next 3-5 years.
What We Believe
We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone, to champion diversity and inclusion and to place people at the centre of everything we do.
Humility
We will listen, learn, be empathetic and help selflessly in our interactions with everyone.
Humanity
Through business, we will better the lives of those less fortunate than ourselves.
Integrity
We honour our commitments and act with responsibility in all our relationships.
Equal Employment Opportunity Statement
UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation.
All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law.
UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.
To support and promote the values of UST.
Comply with all Company policies and procedures
Skills
project management,partnership,revenue generation,design verification,customer relationship management,workforce planning,project execution,service operation center,semiconductor,user interface
Show more Show less
UST Title- Delivery Manager II
Who We Are
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
Summary
The Practice Head – Design Verification (DV) will lead and scale UST's Design Verification practice by driving business growth, delivery excellence, capability development, talent strategy, and customer success across ASIC, SoC, IP, and subsystem verification engagements. This leadership role combines deep technical expertise with strong business acumen to build a differentiated verification practice and establish UST as a trusted partner for global semiconductor customers.
The Opportunity
UST is looking for a Practice Head – Design Verification (DV) to build, scale, and lead its Design Verification practice. The ideal candidate will own the practice strategy, P&L, customer engagement, solution development, and organizational growth while driving innovation and delivery excellence across semiconductor verification services.
Key Roles & Responsibilities
Practice Growth & Business Development
ø Own DV practice P&L, revenue, margins, and growth targets.
ø Develop and execute a 3-year practice growth strategy.
ø Work closely with sales, account managers, and delivery leaders to identify and pursue opportunities.
ø Participate in customer meetings, solution discussions, and RFP/RFQ responses.
ø Build strategic relationships with semiconductor customers globally.
ø Drive mining of existing accounts and acquisition of new logos.
ø KPIs, Revenue growth, New customer acquisitions, Pipeline generation, Conversion rate and Gross margin
Capability Building
Define And Build Capabilities In
ø Functional Verification
ø UVM
ø SystemVerilog
ø Assertion-Based Verification (ABV)
ø Coverage-Driven Verification
ø Advanced Verification
ø Formal Verification
ø Emulation
ø FPGA Prototyping
ø Portable Stimulus
ø SoC Verification
ø Subsystem Verification
ø Integration Verification
ø Performance Verification
ø Low Power Verification (UPF)
ø Protocol Expertise
ø PCIe
ø USB
ø Ethernet
ø DDR
ø MIPI
ø CXL
ø UCIe
ø AMBA AXI/AHB/APB
ø AMS Verification
ø Mixed Signal Verification
ø Real Number Modeling
ø KPIs
ø Number of certified engineers
ø New capability launches
ø Reusable verification IPs developed
Delivery Excellence
ø Ensure successful execution of all DV projects.
ø Establish delivery governance and review mechanisms.
ø Improve productivity through reusable methodologies and automation.
ø Ensure customer satisfaction and delivery quality.
ø Drive predictable project execution.
ø KPIs
ø Customer satisfaction score
ø On-time delivery
ø Defect leakage
ø Resource utilization
ø Repeat business
Talent Strategy & Organization Development
ø Build a strong DV talent pipeline.
ø Define hiring strategy and workforce planning.
ø Drive competency development and career progression.
ø Mentor senior technical leaders and architects.
ø Improve employee retention and engagement.
ø KPIs
ø Headcount growth
ø Attrition
ø Internal promotions
ø Training hours per employee
Solution & IP Development
ø Build reusable verification frameworks and accelerators.
ø Develop differentiated solutions for target markets.
ø Create Offerings Around
ø SoC Verification
ø IP Verification
ø AMS Verification
ø Formal Verification
ø Emulation
ø KPIs
ø Reusable assets created
ø Productivity improvement
ø Solution-led wins
Industry Thought Leadership
ø Represent the company in semiconductor forums and conferences.
ø Publish technical papers and white papers.
ø Build partnerships with EDA vendors and ecosystem players.
ø KPIs
ø Conference presentations
ø White papers published
ø Strategic partnerships
ø Preferred Experience
ø 18+ years in semiconductor industry.
ø 8+ years leading large verification teams.
What You Need
Proven leadership experience in building and scaling Design Verification organizations within a semiconductor services environment.
Strong business development, customer engagement, and practice management capabilities with ownership of revenue and profitability.
Experience managing large global delivery teams and driving operational excellence.
Demonstrated success in developing reusable IPs, accelerators, and differentiated verification solutions.
Ability to build high-performing engineering teams and mentor senior technical leaders.
Strong stakeholder management and executive communication skills.
Required Skills
Functional Verification
SystemVerilog
Universal Verification Methodology (UVM)
Assertion-Based Verification (ABV)
Coverage-Driven Verification
SoC, Subsystem, and IP Verification
Integration and Performance Verification
Formal Verification
Emulation
FPGA Prototyping
Portable Stimulus
Low Power Verification (UPF)
AMS and Mixed Signal Verification
Real Number Modeling (RNM)
Protocol Verification including PCIe, USB, Ethernet, DDR, MIPI, CXL, UCIe, and AMBA (AXI/AHB/APB)
Practice P&L Management
Business Development and Customer Relationship Management
Delivery Governance and Quality Management
Talent Development and Organization Building
Desired Skills
Experience driving verification practice growth within a semiconductor services organization.
Expertise in Automotive SoC Verification and AI SoC Verification.
Experience developing reusable verification IPs, frameworks, and accelerators.
Strong partnerships with EDA vendors and semiconductor ecosystem players.
Experience presenting at industry conferences and publishing technical papers or white papers.
Proven ability to build scalable engineering organizations of 500+ engineers.
Educational Qualification
B.E./B.Tech/M.E./M.Tech in Electronics, ECE, Electrical Engineering, or related disciplines.
Success Metrics for First 12 Months
Area
Target
Revenue Growth
25-40%
New Customers
3-5
Pipeline Creation
3X annual target
Delivery CSAT
>4.5/5
Headcount Growth
20-30%
New Offerings
3-5
Strategic Partnerships
2-3
What Good Looks Like After 1 Year
The DV Practice Head Has
ø A clearly differentiated verification practice.
ø Strong customer connect with top semiconductor companies such as AMD, Analog Devices, NVIDIA, Qualcomm and others.
ø A healthy talent pyramid.
ø Strong protocol and SoC verification capabilities.
ø Predictable revenue growth and delivery excellence.
ø A leadership bench capable of scaling the practice beyond 500+ engineers.
ø For UST specifically, I would recommend adding explicit ownership for AMS Verification, Formal Verification, Emulation, and Automotive/AI SoC verification, as these areas can become strong differentiators in the next 3-5 years.
What We Believe
We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone, to champion diversity and inclusion and to place people at the centre of everything we do.
Humility
We will listen, learn, be empathetic and help selflessly in our interactions with everyone.
Humanity
Through business, we will better the lives of those less fortunate than ourselves.
Integrity
We honour our commitments and act with responsibility in all our relationships.
Equal Employment Opportunity Statement
UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation.
All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law.
UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.
To support and promote the values of UST.
Comply with all Company policies and procedures
Skills
project management,partnership,revenue generation,design verification,customer relationship management,workforce planning,project execution,service operation center,semiconductor,user interface
Show more Show less