MT
Core Logic Design Lead
Accepting applicationsMulya Technologies · Greater Bengaluru Area
Full-Time Mid_senior ARMAsicRTLSOCate
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
India
Core Logic Design Lead
Fortune 100 Organization
Location: Bangalore
Your Role And Responsibilities
Collaborate with micro architect, designers to propose and demonstrate the core CPU and Fabric micro architectural features to drive performance per area/power on targeted workloads.
Collaborate with Silicon Bringup team and Software team to verify and debug microarchitecture and its performance.
Strong ability to communicate and drive to closure micro architectural proposals within Cache and coherent Fabric with technical stakeholders across Chip/System with presentation and documents.
Strong collaborative and interpersonal skills and a proven ability to guide new design team members
Required Technical And Professional Expertise
15+ years experience in high performance microprocessor architecture, micro architecture, computer architecture.
Deep knowledge of Processor Instruction set architecture (e.g ARM, X86, Power).
Deep understanding/experience of CPU microarchitecture and architecture with experience in: L1, L2 caches, Prefetch, Cache Coherent interconnect Fabric.
Large multi chip/system Cache Coherency experience, SOC/Multi-Chip Coherency Fabric and Memory Subsystem micro-architecture.
Deep understanding/experience of Coherent Interconnect Bus Architecture for CPU on-chip/off-chip network, MP coherency and last level system caches.
Strong RTL design expertise and hands-on experience of Processor/Asic design flow: design, verification, PD synthesis, ECO, bring up.
Contact
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
https://mulyatech.com/
Show more Show less
Fortune 100 Organization
Location: Bangalore
Your Role And Responsibilities
Collaborate with micro architect, designers to propose and demonstrate the core CPU and Fabric micro architectural features to drive performance per area/power on targeted workloads.
Collaborate with Silicon Bringup team and Software team to verify and debug microarchitecture and its performance.
Strong ability to communicate and drive to closure micro architectural proposals within Cache and coherent Fabric with technical stakeholders across Chip/System with presentation and documents.
Strong collaborative and interpersonal skills and a proven ability to guide new design team members
Required Technical And Professional Expertise
15+ years experience in high performance microprocessor architecture, micro architecture, computer architecture.
Deep knowledge of Processor Instruction set architecture (e.g ARM, X86, Power).
Deep understanding/experience of CPU microarchitecture and architecture with experience in: L1, L2 caches, Prefetch, Cache Coherent interconnect Fabric.
Large multi chip/system Cache Coherency experience, SOC/Multi-Chip Coherency Fabric and Memory Subsystem micro-architecture.
Deep understanding/experience of Coherent Interconnect Bus Architecture for CPU on-chip/off-chip network, MP coherency and last level system caches.
Strong RTL design expertise and hands-on experience of Processor/Asic design flow: design, verification, PD synthesis, ECO, bring up.
Contact
Uday
Mulya Technologies
muday_bhaskar@yahoo.com
https://mulyatech.com/
Show more Show less