Core EDA Engineers / Staff or Senior Staff – Synthesis & Routing (C++)

About Lattice
At Lattice, we build technology with focus and intent.
We develop low-power programmable solutions that power innovation across edge AI, connectivity, and security. Our teams work across silicon, software, and systems—with a strong emphasis on ownership, speed, and real impact.
Within our EDA organization, engineers don’t just integrate flows—they build the core engines that drive synthesis, placement, routing, and optimization. This is where deep technical problems meet real-world impact.

About the Role
We are hiring experienced EDA engineers to work on the core engines behind Lattice’s FPGA design toolchain.
This role focuses on building and evolving synthesis and routing frameworks, working at the intersection of algorithms, large-scale systems, and performance engineering.
You will operate across problem definition, algorithm design, implementation, and optimization, with strong ownership over foundational components of the toolchain.
We are hiring across multiple experience levels within this role, with scope aligned to individual expertise and impact.

What You’ll Do
Design and develop core engines for:
Logic synthesis
Placement and routing
Timing and design optimization
Build high-performance systems using modern C++, focusing on scalability and efficiency
Develop and refine algorithms for:
Graph optimization
Timing analysis
Physical design constraints
Contribute to end-to-end design flows from RTL to implementation
Debug complex issues across large, interdependent systems
Drive improvements in QoR (quality of results), runtime, and scalability
Collaborate with teams across FPGA architecture, silicon, and software tools

What You Bring
6+ years of hands-on experience in EDA software development
Strong programming expertise in C++ (data structures, algorithms, performance optimization)
Proven experience contributing to core tool engines, including:
Synthesis
Placement & routing
Timing / optimization frameworks
Strong understanding of:
Digital design concepts (RTL, netlists, timing)
Algorithm design and optimization techniques
Experience working on large, complex codebases
Strong debugging and problem-solving skills

What Makes You Stand Out
Experience building or enhancing production-grade EDA tools
Strong background in graph algorithms, heuristics, or optimization techniques
Familiarity with FPGA or ASIC physical design flows
Passion for solving deep technical problems at scale

Why This Role
Work on core engines, not peripheral tooling
Solve challenging problems across algorithms, systems, and hardware design
High ownership in a focused, high-impact engineering team
Direct influence on performance, scalability, and quality of design flows
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