CAD Engineer – EDA Tools & Infrastructure (IT/CAD Support)

About the Role
We are looking for a CAD/EDA Infrastructure Engineer to own the deployment, administration, and support of the EDA tool ecosystem used by our chip design teams. You will be the bridge between IT infrastructure and semiconductor design engineering, ensuring designers have reliable, high-performance access to tools from Synopsys, Cadence, and Siemens EDA (Mentor Graphics) across our compute environment.


Key Responsibilities
EDA Tool Management
Install, configure, upgrade, and maintain EDA tools from Synopsys, Cadence, and Siemens EDA.
Manage tool versioning, patch releases, and multi-version coexistence using environment module systems (Modules/Lmod) or wrapper scripts.
Validate new tool releases with design teams before production rollout; maintain rollback paths.
License Administration
Administer FlexLM / FlexNet (lmgrd), Synopsys SCL, Cadence license servers, Siemens licensing (SaltD/FlexLM), and Cryptlex-based licensing platforms (license server setup, activations, offline/floating licenses, and API-based license management).
Monitor license utilization, generate usage reports, forecast license needs, and support license procurement/renewal decisions.
Configure license queuing, reservations, and options files for fair sharing across project teams and geographies.
Troubleshoot license checkout failures, daemon crashes, and WAN latency issues for distributed teams.
Compute Infrastructure & Job Scheduling
Administer and optimize HPC compute farms used for simulation, synthesis, place-and-route, and signoff workloads.
Tune job slot allocation, memory limits, queue policies, and priority schemes for peak tapeout demand.
Support hybrid/cloud burst environments for EDA workloads, AWS experience preferred (EC2, FSx/EFS, ParallelCluster, S3), including cloud license and data-transfer considerations.


Required Qualifications
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field.
4+ years administering EDA tools and licenses in a semiconductor design environment.
Hands-on experience with at least two of the three major EDA vendors (Synopsys, Cadence, Siemens EDA).
Strong Linux administration skills (RHEL/CentOS/Rocky), filesystems, NFS, performance tuning, debugging.
Proficiency with FlexLM/FlexNet license administration and troubleshooting; experience with modern licensing platforms such as Cryptlex (hosted/on-premise license servers, floating licenses, REST API automation) is a strong plus.
Experience with at least one batch scheduler (LSF, Grid Engine, Slurm, or Altair NC).
Scripting proficiency: Python and shell (bash/tcsh); Perl or Tcl a plus.
Understanding of chip design flows (RTL → synthesis → P&R → signoff; or analog/custom flows) sufficient to communicate effectively with design engineers.

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