TS
BSP Development engineer
Accepting applicationsTALENT Software Services · United States
Full-Time Mid_senior DDRFPGA
Posted
20 Jul
Category
Design
Experience
Mid_senior
Country
United States
Possible 3 Month CTH
Role name: BSP Development engineer
Work Location: US REMOTE
Start date: Immediate availability.
Background check MANDATORY
Role Overview:
Graphics Core skills
Embedded graphics development experience using OpenGL.
Epic Deos experience - preferred.
Platform Core skills
Multi-Core Processor Architecture (General Understanding)
Strong fundamentals of multi-core processing concepts and system-level behavior.
Processor and Memory Architecture
In-depth knowledge of shared memory access across multiple cores, including GPU interaction:
Memory Controller design and operation
Cache memory hierarchy (L1, L2, L3, etc.)
Main memory systems (e.g., DDR)
Shared Resource Monitoring and Analysis
Understanding of monitoring mechanisms for shared resource usage, including:
Performance counters
Quality of Service (QoS) mechanisms
Techniques for Worst-Case Execution Time (WCET) computation
WCET Analysis with Interference Considerations
Capability to analyze WCET under the influence of various interference channels such as:
I/O subsystems
GPU
SSD
FPGA
Other shared resources
DEOS Expertise
Practical knowledge of DEOS (or equivalent RTOS), with a focus on:
Cache partitioning techniques
Resource isolation and management
Regulatory Knowledge
Familiarity with AC 20-193 (FAA guidance on multi-core processor certification) is a strong advantage.
Key Responsibilities
GPU driver development
Embedded graphics development experience using OpenGL.
Epic Deos experience
Mandatory skills:
Embedded graphics development experience using OpenGL.
Optional skills:
Epic Deos experience
Show more Show less
Role name: BSP Development engineer
Work Location: US REMOTE
Start date: Immediate availability.
Background check MANDATORY
Role Overview:
Graphics Core skills
Embedded graphics development experience using OpenGL.
Epic Deos experience - preferred.
Platform Core skills
Multi-Core Processor Architecture (General Understanding)
Strong fundamentals of multi-core processing concepts and system-level behavior.
Processor and Memory Architecture
In-depth knowledge of shared memory access across multiple cores, including GPU interaction:
Memory Controller design and operation
Cache memory hierarchy (L1, L2, L3, etc.)
Main memory systems (e.g., DDR)
Shared Resource Monitoring and Analysis
Understanding of monitoring mechanisms for shared resource usage, including:
Performance counters
Quality of Service (QoS) mechanisms
Techniques for Worst-Case Execution Time (WCET) computation
WCET Analysis with Interference Considerations
Capability to analyze WCET under the influence of various interference channels such as:
I/O subsystems
GPU
SSD
FPGA
Other shared resources
DEOS Expertise
Practical knowledge of DEOS (or equivalent RTOS), with a focus on:
Cache partitioning techniques
Resource isolation and management
Regulatory Knowledge
Familiarity with AC 20-193 (FAA guidance on multi-core processor certification) is a strong advantage.
Key Responsibilities
GPU driver development
Embedded graphics development experience using OpenGL.
Epic Deos experience
Mandatory skills:
Embedded graphics development experience using OpenGL.
Optional skills:
Epic Deos experience
Show more Show less
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