II
ATE Test Engineer
Accepting applicationsiFlow Inc. · Mountain View, CA
Full-Time Mid ATEDDRSoCmixed-signal
Posted
10 Jun
Category
Test
Experience
Mid
Country
United States
Title: ATE Test Engineer
Location: Mountain View, CA- On-site work
Duration: Full-time Only
Experience:10-15 Years
Key Responsibilities
Develop and debug ATE test programs for IP and SoC devices.
Perform IP-level characterization and validation.
Execute functional tests including HSIO, DDR, and vector-based testing.
Work on SMT8/93K or similar ATE platforms.
Support translation of functional models into production test vectors.
Collaborate with design, DV, and product engineering teams.
Perform debug, failure analysis, and test optimization.
Contribute to Digital and AMS block testing.
Required Qualifications
Hands-on experience with ATE platforms (e.g., Advantest 93K, SMT8).
Strong background in digital test methodologies.
Experience with HSIO, DDR, or similar high-speed interfaces.
Familiarity with vector translation and functional model testing.
Bachelor s or Master s degree in Electrical/Electronics Engineering.
Preferred
Experience with mixed-signal (AMS) testing.
Exposure to IP-level or SoC characterization flows.
Show more Show less
Location: Mountain View, CA- On-site work
Duration: Full-time Only
Experience:10-15 Years
Key Responsibilities
Develop and debug ATE test programs for IP and SoC devices.
Perform IP-level characterization and validation.
Execute functional tests including HSIO, DDR, and vector-based testing.
Work on SMT8/93K or similar ATE platforms.
Support translation of functional models into production test vectors.
Collaborate with design, DV, and product engineering teams.
Perform debug, failure analysis, and test optimization.
Contribute to Digital and AMS block testing.
Required Qualifications
Hands-on experience with ATE platforms (e.g., Advantest 93K, SMT8).
Strong background in digital test methodologies.
Experience with HSIO, DDR, or similar high-speed interfaces.
Familiarity with vector translation and functional model testing.
Bachelor s or Master s degree in Electrical/Electronics Engineering.
Preferred
Experience with mixed-signal (AMS) testing.
Exposure to IP-level or SoC characterization flows.
Show more Show less