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Associate III - VLSI SDC Design Engineer
Accepting applicationsUST · Noida, Uttar Pradesh, India
Full-Time Mid_senior Standard CellPPALibertyVerilogCharacterization
Estimated market salary
₹16-25 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
India
Role Description
Job description: Std cells Person having 3+ years experience in standard cell design and verification. He / she should be having sound knowledge of different types of standard cells (Combinational, sequential Level shifters etc) and verifications of the same. He / She should be able to benchmark different standard cells for PPA. Awareness of digital flow will be a plus. Person is supposed to work with and guide other junior members in design and layout domain.
Skills
vlsi design,benchmarking,cell design,digiteal,
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Job description: Std cells Person having 3+ years experience in standard cell design and verification. He / she should be having sound knowledge of different types of standard cells (Combinational, sequential Level shifters etc) and verifications of the same. He / She should be able to benchmark different standard cells for PPA. Awareness of digital flow will be a plus. Person is supposed to work with and guide other junior members in design and layout domain.
Skills
vlsi design,benchmarking,cell design,digiteal,
Show more Show less