DC
ASIC RTL Design Lead Engineer
Accepting applicationsDasro Consulting Inc. · Noida, Uttar Pradesh, India
Full-Time Mid_senior ASICRTLSystemVerilogVerilog
Estimated market salary
₹7-12 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
India
We have a new requirement for ASIC RTL Design Lead Engineer for our client. This is a FT role.
Experience: 7-15 Years
Location: Noida
Job Responsibilities:
Strong ASIC RTL design (Verilog/SystemVerilog), CDC, Lint
Experience in micro-architecture, integration, and debugging
Exposure to synthesis, timing, and low-power design
Team leadership and cross-functional collaboration skills
Required Qualifications:
Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering
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Experience: 7-15 Years
Location: Noida
Job Responsibilities:
Strong ASIC RTL design (Verilog/SystemVerilog), CDC, Lint
Experience in micro-architecture, integration, and debugging
Exposure to synthesis, timing, and low-power design
Team leadership and cross-functional collaboration skills
Required Qualifications:
Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering
Show more Show less