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ASIC/FPGA Design Manager

Accepting applications

ALKU · North Reading, MA

Full-Time Mid_senior ASICATECadenceDDRDFT
Posted
11 Jun
Category
Design
Experience
Mid_senior
Country
United States
ASIC/FPGA Design Manager

Background
Our client is seeking an experienced FPGA Design Manager to lead a team of ASIC & FPGA engineers supporting the development of next-generation equipment and test platforms. This individual will provide both technical leadership and people management while driving FPGA architecture, design, verification, implementation, and system integration efforts across diverse portfolio of test and measurement products.

The ideal candidate will possess a strong FPGA design background combined with exposure to ASIC development methodologies and digital design best practices. This role will lead a team of approximately 5-10 FPGA engineers while partnering closely with hardware, software, systems, ASIC, and product engineering organizations.

Project
The FPGA Design Manager will oversee FPGA development activities supporting multiple product lines used for semiconductor testing, validation, characterization, and instrumentation applications. These platforms leverage high-performance digital systems, high-speed interfaces, data acquisition architectures, embedded processing, and real-time control technologies.

The manager will be responsible for technical execution, resource planning, team development, architecture reviews, and ensuring successful delivery of FPGA solutions across multiple concurrent development programs.

Responsibilities
Lead, mentor, and develop a team of 5-10 FPGA Design Engineers
Manage project priorities, technical direction, staffing, and execution schedules
Drive FPGA architecture, RTL development, verification, implementation, integration, and release activities
Provide technical leadership across multiple semiconductor test and instrumentation product platforms
Collaborate with hardware, software, systems, ASIC, validation, and product engineering teams throughout the development lifecycle
Conduct architecture reviews, code reviews, and design reviews
Support FPGA bring-up, system integration, debugging, and root-cause analysis efforts
Guide development of high-speed digital interfaces, data processing pipelines, embedded control systems, and real-time architectures
Support long-term FPGA technology roadmap planning and architectural strategy
Drive engineering best practices, development methodologies, and process improvements
Participate in hiring, performance management, employee development, and succession planning
Ensure successful execution across multiple concurrent FPGA development projects

Required Skills
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related discipline
8+ years of FPGA design and development experience
3+ years of technical leadership or engineering management experience
Experience leading teams of 5-10 FPGA engineers
Strong FPGA development experience using AMD/Xilinx FPGA families and toolchains
Experience utilizing Cadence design and verification tools
Strong understanding of FPGA architecture, RTL design, synthesis, timing closure, implementation, and hardware bring-up
Proficiency with Verilog, VHDL, and/or SystemVerilog
Experience developing complex digital systems for high-performance hardware applications
Strong understanding of FPGA verification methodologies and simulation environments
Working knowledge of ASIC development methodologies and digital design flows
Familiarity with ASIC concepts including RTL design, functional verification, CDC analysis, linting, timing constraints, and DFT methodologies
Strong debugging, problem-solving, and root-cause analysis skills
Excellent communication, leadership, and cross-functional collaboration skills

Preferred Qualifications
Prior ASIC or SoC design experience
Experience with semiconductor test equipment, automated test equipment (ATE), instrumentation, or high-performance electronic systems
Experience with FPGA prototyping of ASIC designs
Experience with UVM-based verification methodologies
Familiarity with ASIC implementation concepts including synthesis, static timing analysis, power analysis, and physical design flows
Experience with PCIe, Ethernet, DDR memory interfaces, SerDes, JESD204, and other high-speed communication protocols
Experience with AMD/Xilinx UltraScale, UltraScale+, Versal, or next-generation FPGA technologies
Experience supporting complex multi-board digital hardware systems

Technologies Used
AMD/Xilinx FPGA Platforms
Cadence Design Tools
Verilog
VHDL
SystemVerilog
UVM
RTL Design
FPGA Verification
ASIC Methodologies
PCIe
Ethernet
DDR Memory
SerDes
High-Speed Digital Design
Embedded Processing Systems
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