LM

ASIC & FPGA Design Engineer Stf

Accepting applications

Lockheed Martin · Orlando, FL

Full-Time Mid ASICCadenceFPGAMentorPerl
Posted
2d ago
Category
Design
Experience
Mid
Country
United States
Basic Qualifications

Associate degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related technical discipline
8 or more years of experience in full-custom analog or mixed-signal IC layout design
Layout experience across process nodes ranging from 130nm to 12nm, including BCD technologies
Proficiency with Synopsys Custom Compiler (or Custom Designer)
Proficiency with Cadence Virtuoso layout environment
Experience with physical verification closure (DRC, LVS, ERC, ANT) across multiple foundry processes
Ability to obtain a U.S. security clearance

Job Description

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced defense systems, ranging from 130 nm down to 12 nm and including high voltage BCD processes.

What You Will Be Doing

As the ASIC & FPGA Design Engineer you will own the entire layout flow—from floorplan through tape out—working hand in hand with circuit designers to turn schematic intent into high performance, parasitic aware physical designs. You will operate in a dual tool environment (Synopsys Custom Compiler and Cadence Virtuoso) and drive physical verification closure across multiple foundries, directly supporting mission critical programs. Your responsibilities will include:

Create floorplans, place and route analog blocks, optimizing area, matching, signal integrity and power delivery.
Drive DRC, LVS and ERC verification to achieve full closure for each target process.
Perform or support EMIR analysis to detect and remediate IR drop and electromigration concerns.
Develop and maintain layout methodology, automation scripts and best practice guidelines for the department.
Collaborate with circuit designers, verification engineers and system architects to ensure the layout reflects functional intent and performance targets.
Manage tape out sign off packages, including documentation, design rule decks and release notes.
Mentor junior layout engineers and promote an inclusive, knowledge sharing culture.

Why Join Us

Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.

We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin’s comprehensive benefits package here.

Further Information About This Opportunity

This position is remote.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.

Desired Skills

Bachelor degree or higher in Electrical Engineering, Microelectronics, or a related field
EMIR analysis experience, including IR drop and electromigration mitigation
Scripting or layout automation skills (SKILL, Tcl, Python, or Perl)
Layout experience with precision analog blocks such as PLLs, ADC/DACs, LDOs, bandgap references, or amplifiers

Other Important Information

By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.

Ability to work remotely

Full-time Remote Telework: The employee selected for this position will work remotely full time at a location other than a Lockheed Martin designated office/job site. Employees may travel to a Lockheed Martin office for periodic meetings.
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