IG
ASIC Design Verification Engineer
Accepting applicationsInsight Global · Greater Minneapolis-St. Paul Area
Full-Time Mid_senior AIASICDDREthernetFPGA
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
N/A
Location: Hybrid in St. Paul, MN (Tues-Thurs onsite, flexibility outside of core onsite days)
Schedule: 9/80 schedule with every other Friday off
Employment Type: Permanent Direct Hire
Compensation: $130,000 - $220,000 depending on experience and level
Benefits
Flexible 9/80 work schedule with every other Friday off
Comprehensive medical, dental, and vision coverage
401(k) with company contribution
Generous PTO and holiday package
Short-term and long-term incentive eligibility
Stable, long-term career growth opportunity
Company Overview
Our client is a leading provider of advanced ASIC technology, delivering high-performance microelectronic solutions across commercial, aerospace, defense, and security markets. The organization operates a full ASIC design environment with expertise spanning digital design, verification, FPGA development, analog/mixed-signal engineering, and physical implementation. Backed by a large parent organization, the team offers the resources and stability of an established enterprise while maintaining the collaborative feel of a specialized engineering group.
Required Skills & Experience
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
2+ years of ASIC, SoC, FPGA, or IP verification experience
Strong experience with SystemVerilog and UVM
Experience developing block, IP, subsystem, or SoC-level verification environments
Experience creating verification plans, test cases, sequences, scoreboards, checkers, assertions, and functional coverage models
Understanding of constrained-random verification, directed testing, regressions, and coverage closure
Strong RTL, testbench, and integration debug skills
Experience with scripting and automation using Python, Perl, Tcl, Shell, or similar languages
Familiarity with simulation, debug, and coverage analysis tools
Ability to interpret design specifications and technical documentation
Strong communication and cross-functional collaboration skills
Nice-to-Have Skills
Verification of complex SoCs, processors, accelerators, networking devices, or AI/ML-focused designs
Experience with PCIe, CXL, DDR, LPDDR, Ethernet, USB, MIPI, AXI, AMBA, CHI, or UCIe
Formal verification or assertion-based verification
Low-power verification, UPF/CPF, gate-level simulation, reset verification, or X-propagation analysis
FPGA prototyping, emulation, co-verification, or post-silicon support
Mixed-signal verification experience
Experience mentoring junior engineers or improving verification methodologies
Job Description
We are seeking an ASIC Design Verification Engineer to support the verification of complex ASIC, SoC, IP, subsystem, and FPGA designs. This is a hands-on engineering role focused on developing robust verification environments, creating and executing test plans, debugging challenging design issues, and driving verification closure.
The ideal candidate enjoys working closely with architecture, RTL, firmware, FPGA, and mixed-signal engineering teams to ensure designs meet functional, performance, and quality objectives. While the role was originally written for a senior-level engineer, the team is open to high-potential junior and mid-level candidates who demonstrate strong technical aptitude, problem-solving ability, and cultural fit.
Key Responsibilities
Develop and execute verification plans for ASIC, SoC, IP, subsystem, and FPGA designs
Build and maintain SystemVerilog/UVM verification environments
Create testbench components including drivers, monitors, scoreboards, sequences, checkers, and coverage models
Develop directed and constrained-random test cases
Analyze specifications and collaborate with design teams to define verification requirements
Drive verification closure through coverage analysis, regressions, and bug tracking
Debug RTL, testbench, and integration issues using simulation and waveform analysis tools
Participate in design reviews and verification reviews
Support automation, regression development, and verification flow improvements
Collaborate with design, firmware, FPGA, and mixed-signal engineering teams throughout the development lifecycle
Contribute to reusable verification methodologies and engineering best practices
Mentor junior engineers when appropriate
Note: The hiring team is open to strong engineers with 2-4 years of experience if they demonstrate exceptional technical aptitude, strong communication skills, and the ability to thrive in a collaborative engineering environment.
We are a company committed to creating inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity employer that believes everyone matters. Qualified candidates will receive consideration for employment opportunities without regard to race, religion, sex, age, marital status, national origin, sexual orientation, citizenship status, disability, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to Human Resources Request Form. The EEOC "Know Your Rights" Poster is available here.
To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy.
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Schedule: 9/80 schedule with every other Friday off
Employment Type: Permanent Direct Hire
Compensation: $130,000 - $220,000 depending on experience and level
Benefits
Flexible 9/80 work schedule with every other Friday off
Comprehensive medical, dental, and vision coverage
401(k) with company contribution
Generous PTO and holiday package
Short-term and long-term incentive eligibility
Stable, long-term career growth opportunity
Company Overview
Our client is a leading provider of advanced ASIC technology, delivering high-performance microelectronic solutions across commercial, aerospace, defense, and security markets. The organization operates a full ASIC design environment with expertise spanning digital design, verification, FPGA development, analog/mixed-signal engineering, and physical implementation. Backed by a large parent organization, the team offers the resources and stability of an established enterprise while maintaining the collaborative feel of a specialized engineering group.
Required Skills & Experience
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
2+ years of ASIC, SoC, FPGA, or IP verification experience
Strong experience with SystemVerilog and UVM
Experience developing block, IP, subsystem, or SoC-level verification environments
Experience creating verification plans, test cases, sequences, scoreboards, checkers, assertions, and functional coverage models
Understanding of constrained-random verification, directed testing, regressions, and coverage closure
Strong RTL, testbench, and integration debug skills
Experience with scripting and automation using Python, Perl, Tcl, Shell, or similar languages
Familiarity with simulation, debug, and coverage analysis tools
Ability to interpret design specifications and technical documentation
Strong communication and cross-functional collaboration skills
Nice-to-Have Skills
Verification of complex SoCs, processors, accelerators, networking devices, or AI/ML-focused designs
Experience with PCIe, CXL, DDR, LPDDR, Ethernet, USB, MIPI, AXI, AMBA, CHI, or UCIe
Formal verification or assertion-based verification
Low-power verification, UPF/CPF, gate-level simulation, reset verification, or X-propagation analysis
FPGA prototyping, emulation, co-verification, or post-silicon support
Mixed-signal verification experience
Experience mentoring junior engineers or improving verification methodologies
Job Description
We are seeking an ASIC Design Verification Engineer to support the verification of complex ASIC, SoC, IP, subsystem, and FPGA designs. This is a hands-on engineering role focused on developing robust verification environments, creating and executing test plans, debugging challenging design issues, and driving verification closure.
The ideal candidate enjoys working closely with architecture, RTL, firmware, FPGA, and mixed-signal engineering teams to ensure designs meet functional, performance, and quality objectives. While the role was originally written for a senior-level engineer, the team is open to high-potential junior and mid-level candidates who demonstrate strong technical aptitude, problem-solving ability, and cultural fit.
Key Responsibilities
Develop and execute verification plans for ASIC, SoC, IP, subsystem, and FPGA designs
Build and maintain SystemVerilog/UVM verification environments
Create testbench components including drivers, monitors, scoreboards, sequences, checkers, and coverage models
Develop directed and constrained-random test cases
Analyze specifications and collaborate with design teams to define verification requirements
Drive verification closure through coverage analysis, regressions, and bug tracking
Debug RTL, testbench, and integration issues using simulation and waveform analysis tools
Participate in design reviews and verification reviews
Support automation, regression development, and verification flow improvements
Collaborate with design, firmware, FPGA, and mixed-signal engineering teams throughout the development lifecycle
Contribute to reusable verification methodologies and engineering best practices
Mentor junior engineers when appropriate
Note: The hiring team is open to strong engineers with 2-4 years of experience if they demonstrate exceptional technical aptitude, strong communication skills, and the ability to thrive in a collaborative engineering environment.
We are a company committed to creating inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity employer that believes everyone matters. Qualified candidates will receive consideration for employment opportunities without regard to race, religion, sex, age, marital status, national origin, sexual orientation, citizenship status, disability, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to Human Resources Request Form. The EEOC "Know Your Rights" Poster is available here.
To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy.
Show more Show less