ASIC Design Manager

Job Summary

Seeking an ASIC Design Manager for a high growth semiconductor capital equipment manufacturer in the Reading, MA area.

As an ASIC Design Manager you will own the entire physical implementation (RTL-to-GDSII) of complex ASICs. Working closely with cross-functional architecture and design teams, you will guide physical design strategy, mentor junior engineers, and play a vital role in delivering high-quality, first-pass silicon at advanced nodes.

Full benefits offered! Paid Relo available! Great compensation structure including bonuses and stock offering. Hybrid work schedule (4 days on site, 1 day WFH).

location: North Reading, Massachusetts

job type: Permanent

salary: $240,000 - 280,000 per year

work hours: 8am to 4pm

education: Bachelors

Responsibilities

Team Leadership: Lead and mentor a team of physical design engineers across the full project lifecycle.
Architecture & Planning: Lead high-level physical design planning and define PD architecture in collaboration with chip and system architects.
Floorplanning & Budgeting: Develop and own chip floorplans, timing budgets, power estimates, and pin planning.
Design Constraints: Partner with design teams to develop high-quality SDC constraints.
Front-to-Back Implementation: Drive RTL-to-netlist activities including synthesis, logical equivalence checking (LEC), clock domain crossing checks (CDC), and static timing analysis (STA).
Block-Level P&R: Support hands-on place-and-route (P&R) for critical and high-speed blocks.
Vendor Collaboration: Collaborate with a backend physical design house to support P&R execution, debug flow or implementation issues, and meet schedule and quality goals.
IP Integration: Integrate complex IP such as PCIe, DDR5/DDR6, UFS, and SerDes.
Signoff Closure: Ensure robust signoff closure including DRC/LVS and EM/IR analysis.
Flow Automation: Develop, enhance, and maintain physical design tool flows and automation.

Qualifications

Experience level: Manager
Minimum 10 years of experience
Education: Bachelors (required)

Skills

Adaptive Design
Product Design
Circuit Board Design
Cadence
Python
Electrical
Spatial Design
Manager
Machine Design
ASIC/FPGA/PLD
Design
Product Design

Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.

At Randstad, we welcome people of all abilities and want to ensure that our hiring and interview process meets the needs of all applicants. If you require a reasonable accommodation to make your application or interview experience a great one, please contact HRsupport@randstadusa.com.

Pay offered to a successful candidate will be based on several factors including the candidate's education, work experience, work location, specific job duties, certifications, etc. In addition, Randstad offers a comprehensive benefits package, including: medical, prescription, dental, vision, AD&D, and life insurance offerings, short-term disability, and a 401K plan (all benefits are based on eligibility).

This posting is open for thirty (30) days.

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

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