TI

Analog Test Engineer — High-Speed Automotive SerDes SoCs (3–10 Yrs)

Accepting applications

Texas Instruments · Bengaluru, Karnataka, India

Full-Time Mid_senior ATEAnalogDFTEthernetMATLAB
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
India
🏢 About Texas Instruments

Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide.

👥 About the Team — High Speed Data Interface Product Group

The High Speed Data Interface product group focuses on the development of differentiated high-speed SerDes SoCs targeted for automotive and industrial markets. There are two primary focus areas — Ethernet PHY and FPD-Link.

Ethernet PHY Group: A large number of applications — like in-vehicle driver alertness monitors, steering, or accelerator control in automotive and robotic applications — require an Ethernet interface. The ubiquity of Ethernet-enabled devices allows customers to simplify connecting large numbers of devices in automotive and robotic environments. Customers expect robust performance in the presence of interference and ESD events, along with processing offload capabilities. The low-cost migration from CAN to Ethernet presents unique challenges requiring interdisciplinary skills with aggressive cost and power targets.

FPD-Link Group: The proprietary FPD-Link interface addresses multi-gigabit (up to 20 Gbps) automotive and industrial sensor and display markets. Constant increase in density of electronic sensing and display content is pushing data rate (>20 Gbps) and BER performance requirements higher. Automotive functional safety requirements demand robust performance at these high data rates under challenging environments while maintaining low power consumption.

The Broader Mission: As part of this product group, you will be engaged in designing solutions spanning Analog, Digital, and Signal Processing domains to mitigate impairments such as high channel loss, ESD strikes, and narrowband interference. The team implements high-performance equalization circuits (CTLE, FFE, DFE), high-speed converters (DAC, ADC), high-speed digital front-ends, signal processing algorithms, embedded microcontrollers, and high-speed interfaces for camera and display systems. The team has successfully achieved several differentiated innovations through collaborative cross-domain optimization.

🌟 The entire product lifecycle — from product specification to customer and application support — is owned by the product group in Bangalore, giving each team member tremendous learning opportunity and enhanced scope to influence the global success of the product. We are looking for passionate, creative, and self-driven engineers who challenge traditional techniques and come up with innovative solutions to make a difference.

🎯 Role Overview

As an Analog Test Engineer, you are the final quality assurance authority for TI's high-speed automotive SerDes SoCs before they reach the customer. You will develop, optimize, and validate comprehensive ATE test programs for complex analog and mixed-signal circuits — covering high-speed DACs, ADCs, PLLs, SerDes front-ends, and precision analog blocks — ensuring that every chip shipped meets automotive-grade performance specifications and zero-defect quality targets.

🔧 Key Responsibilities

Develop and optimize ATE test programs for complex analog and mixed-signal automotive SerDes SoCs on Advantest / Teradyne platforms
Design comprehensive analog parametric test suites covering DC parameters (offset, gain, linearity, PSRR, CMRR), AC parameters (bandwidth, noise, THD, SNR, SFDR), and high-speed performance metrics
Develop precision ADC and DAC test methodologies — INL, DNL, ENOB, SFDR, SNR characterization — for high-speed converters within the SerDes SoC
Build test solutions for PLL and clock generation circuits — phase noise, jitter, lock time, frequency accuracy characterization at multi-GHz frequencies
Develop SerDes analog front-end test strategies — including CTLE/DFE characterization, eye diagram measurement, jitter tolerance, and sensitivity testing
Perform test correlation between bench characterization results and ATE measurements — ensuring test program accuracy and eliminating false failures
Drive test time optimization using parallelism, concurrent test, and algorithmic optimization — without compromising fault coverage or quality
Implement test escape analysis and yield improvement methodologies — identifying systematic yield detractors and working with design teams to address root causes
Develop automotive-grade test quality metrics and ensure AEC-Q100 compliance across all test parameters
Support new product introduction (NPI) — qualifying test programs from first silicon through production ramp

✅ Required Qualifications

Education: B.Tech / M.Tech in Electronics / VLSI / Instrumentation / Electrical Engineering
Experience: 3–10 years of analog or mixed-signal test engineering experience in semiconductor manufacturing
Strong expertise in ATE test program development — Advantest 93K, Teradyne UltraFLEX, or J750 platforms
Deep understanding of analog parametric testing — DC/AC specifications, noise, distortion, linearity
Experience testing high-speed data converters (ADC/DAC) — INL, DNL, ENOB, SFDR, SNR
Proficiency in PLL/clock circuit test development — phase noise, jitter, frequency testing
Working knowledge of mixed-signal test theory — sampling theory, FFT-based test, coherent sampling
Familiarity with automotive quality standards — AEC-Q100, PPAP, zero-defect manufacturing

🌟 Preferred / Good-to-Have Skills

Experience with SerDes / high-speed interface test — BER, eye diagram, jitter tolerance testing on ATE
Background in test hardware design — load boards, probe cards, and custom test fixtures for high-speed ICs
Knowledge of statistical process control (SPC) and test data analysis for yield management
Familiarity with Python / MATLAB for test data analysis, visualization, and automated reporting
Experience with production test ramp — NPI qualification, Cpk analysis, and volume manufacturing transition
Understanding of ESD and latch-up test methodologies for automotive-grade ICs

💡 What Makes This Role Unique


🧪 Precision at Scale Your test programs run on every chip shipped — globally, at automotive volume
🚗 Automotive Quality Zero-defect mandate — your test coverage directly protects automotive safety
🔄 Full Lifecycle Role First silicon correlation → Production test → Customer quality assurance
🤝 Cross-Domain Collaboration Work with analog design, DFT, silicon validation & manufacturing teams
🌍 Global Manufacturing Impact Test solutions deployed in TI's global automotive semiconductor supply chain
📈 Career Growth Rare combination of analog expertise and high-volume semiconductor test experience
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